RealView® Development Suite（RVDS）4.0 是ARM公司继SDT与ADS1.2之后主推的新一代开发工具。RVDS集成的RVCT是业内公认的能够支持所有ARM处理器，并提供最好的执行性能的编译器；RVD是ARM系统调试方案的核心部分，支持含嵌入式操作系统的单核和多核处理器软件开发，可以同时提供相关联的系统级模型构建功能和应用级软件开发功能，为不同用户提供最为合适的调试功效。 目前全球基于ARM处理器的40亿个产品设备中，大部分的软件开发是基于RealView开发工具。安全、可靠和高性能地设计产品的最好选择就是购买ARM RealView开发工具。Product:ARM RealView Development Suite 4.0 Professional Lanaguage:English Platform:/win2000/winxp/Linux Size:659MB
Mentor Graphics provides support for most ASIC vendors and libraries. Austria Mikro Systeme International Atmel Chip Express Corporation ES2/Atmel Fujitsu Hitachi HMC Holtek Semiconductor Hyundai Electronics JMAR Semiconductor, Inc Kawasaki LSI Lightspeed Semiconductor Matsushita Electric Industrial Co., Ltd. (Panasonic) NEC Corporation Oki Semiconductor Philips Semiconductors ROHM Samsung Electronics SANYO Semiconductor Corporation Seiko EPSON TEMIC/Atmel Wireless and uC Texas Instruments Toshiba TSMC UMC Weltrend Winbond Electronics Corp. X-FAB Semiconductor Foundries product:Mentor Graphics Asic Design Kit 3.1 Lanaguage:english Platform:Winxp/Win7 Size:59MB
What are your true cost when you have design engineers waiting for days or weeks for library parts? This cost is not only measured in man hours, but more importantly; in project delays, increased board spins, and ultimately market share losses as a result of missed opportunities. Symbol Wizard intelligently extracts from the vendor data sheet content and relationships including full tables, correlating and verifying the information. Higher level of context extraction includes Standard columnar and table extraction. Constructs such as bussing, termination, differential pairs, power levels, and parametric constraints are captured and maintained. Symbol Wizard accepts electronic files from the FPGA vendor that are used to quickly ( minutes not days ) generate the asymmetrical / heterogeneous schematic Symbol...
With its comprehensive feature set, Cadence® Allegro® PCB Design offers the leading physical and electrical constraint-driven PCB layout and interconnect routing system. The fully integrated design flow includes design creation, library creation, placement, interactive routing and editing, automatic routing, and interfaces for manufacturing and mechanical CAD. The user interface is intuitive, easy-to-use, and consistent throughout the design flow. Large, dense PCB designs with high-speed interfaces can utilize Global Routing Environment technology for intelligent interconnect planning and routing automation. Features/Benefits * Provides a scalable, full-featured PCB design solution * Enables a constraint-driven design flow to reduce design iterations * Provides a single, consistent, front-to-back constraint management environment * Delivers an integrated RF/analog design and mixed-signal design environment * Provides interactive floorplanning...
ArchiFaçade is a Plug-in that allows perspective images (photographs of façades, objects, etc.) to be transformed in order to correct, or \”straighten\” them. Based on the principles of projective geometry, ArchiFaçade uses the appropriate mathematical transformations to remove perspective distortions from an image until a rectified version is generated. DescriptionArchiFaçade is a Plug-in that allows perspective images (photographs of façades, objects, etc.) to be transformed in order to correct, or \”straighten\” them. Based on the principles of projective geometry, ArchiFaçade uses the appropriate mathematical transformations to remove perspective distortions from an image until a rectified version is generatedProduct:Cigraph ArchiFacade v1.98 For Archicad 12 Lanaguage:English Platform:/WinNT/2000/XP Size:1.5MB
Cadimage Door And Window Builder v12.4 For Archicad 12 Freedom to rapidly explore a greater variety of Door & Window styles than you ever imagined Add personality to your designs without limitation as to style, complexity or constructionChoose from a wide variety of panels and opening methods Create exclusive glazing with customizable bars Enhance the appearance with a wide variety of handles and exterior and interior trims and sillsProduct:Cadimage Door And Window Builder v12.4 For Archicad 12 Lanaguage:English Platform:/WinNT/2000/XP Size:8MB
The Cadence® AMS Methodology Kit employs theCadence Advanced Custom Design (ACD) methodology,which leverages silicon-accurate design methods toenable design teams to create differentiated silicon fasterand with less risk. The kit delivers verified, packagedmethodologies (demonstrated on a real-world mixed-signal design) along with applicability consulting.The Cadence® AMS Methodology Kit employs theCadence Advanced Custom Design (ACD) methodology,which leverages silicon-accurate design methods toenable design teams to create differentiated silicon fasterand with less risk. The kit delivers verified, packagedmethodologies (demonstrated on a real-world mixed-signal design) along with applicability consulting.product:Cadence AMS Methodology Kit 6.12 Linux Lanaguage:english Platform:Winxp/Win7 Size:4.14G
Artwork Mask, Modeling and User Interface Enhancements Save Time for RF Designers with Tight Deadlines and Budgets SANTA CLARA, Calif., July 31, 2008 Agilent Technologies Inc. (NYSE: A) today announced shipment of its Genesys 2008.07 release. The new Genesys release contains improvements to the reliability of artwork masks for electromagnetic (EM) verification and RF board manufacturing, along with modeling and user interface improvements. This functionality results in shorter design cycles with fewer iterations for RF designers with tight deadlines and budgets. The Genesys 2008.07 release reliably exports RF board mask and artwork files to a wider set of board fabricators, inexpensive rapid-prototyping machines and a variety of CAD/CAM software for physical product design. The release also includes a graphical artwork...
Cadence Assura 3.20 是新一代深亚微米模拟和混合IC版图验证、 寄生参数提取以及分辩率增强可制造性解决方案。product:Cadence ASSURA 3.20 Linux Lanaguage:English Platform:/Linux Size:1.52G
VCS MX 2008.09 Linux is the industry抯 most comprehensive RTL verification solution in a single product, providing advanced bug-finding technologies, a built-in debug and visualization environment and support for all popular design and verification languages including Verilog, VHDL, SystemVerilog and SystemC™. The VCS solution抯 advanced bug-finding technologies include full-featured Native Testbench, complete assertions and comprehensive code and functional coverage to find more bugs faster and easier. Additionally, the VCS Verification Library provides verification IP for today抯 most popular bus standards. By natively integrating these technologies within its unique, single-compiler architecture, the VCS solution delivers up to 5X faster verification performance compared with using multiple, stand-alone tools. The VCS solution抯 powerful debug and visualization environment minimizes the turnaround time to find and fix...