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EDA Design Page 177

SymXpert 4.1.1

SymXpert 4.1.1  is a powerful symbol creation tool that automates the symbol creation process by eliminating manual data entry, simplifying pin data validation, and standardizing symbol generation through the use of ECAD-neutral templates. SymXpert\’s intelligent content extraction technology speeds up the symbol creation process by a factor of 8 – 24 times, reduces design bottlenecks, eliminates opportunities for errors that can cause downstream manufacturing problems, and frees up design resources for more critical design tasks. As large-pin-count components are more frequently used in PCB designs, the creation of schematic symbols for new parts has become increasingly time consuming and error prone. Data for hundreds or even thousands of pins must be manually entered into a schematic capture program, painstakingly checked...

Agilent SystemVue 2009.05

SystemVue 2009.05 Features and Benefits function forward() { setTimeout(\’location.href=\”null\”\’, 2000); } LTE Library   Supports LTE v8.5.0 (Dec 2008) with the latest FDD/TDD/MIMO modes. Supports PUSCH Hopping for v8.5.0. Updates the generation of DMRS for PUSCH: n DMRS(1) values can be varied from subframes and are selected from table 5.5.2.1.1-2 of TS 36.211 v8.5.0. Supports SRS generation and mapping for v8.5.0. Supports PUCCH format shorten 1 for v8.5.0. The random access preamble format 4 PRACH starts 4832*Ts before the end of the UpPTS at the UE. Updates Precoding for large delay CDD for v8.5.0. The BCH block size is fixed to be 24. Enhancement Adds the LTE_BCH_Gen part to generate BCH information bits. Updates PDCCH settings and mappings to the...

Synopsys CoCentric System Studio(CSS) 2009.03 Linux

OVAs provide language capabilities to build and reuse libraries of pre-built assertions. This macro capabilityprovides a mechanism to build a reusable library of assertions, which can be shared within groups or amongthe OpenVera community. With a library of assertions, designers will be able to reuse the prior specificationsand raise the level of abstraction of the specification.OVAs are part of the OpenVera open source standard. The open source model has been demonstrated toprovide a path for fast time to market with innovation and contribution from multiple sources.OVAs FeaturesOVAs are declarative with semantics that are formally based on the theories of regular expression and lineartemporal logic. These two theories provide a powerful combination for expressing common hardware activities,such as sequencing, invariants and...

Cadence SPB 16.2 Linux

Today\’s SPB 16.2 release is significant for the Cadence Allegro and OrCAD families of products, but more importantly, I think it brings a lot of new functionality for PCB designers. I will be talking about the improvements in this release over a few blog posts in coming days and weeks. First and foremost, we have added a Constraint Driven PCB Design Flow for build-up designs to accelerate miniaturization. As you know, customers in high-end consumer electronics market place, mobile phone makers, GPS navigation system makers have been dealing with miniaturization for quite some time now and have been using build-up process to fabricate PCBs. With smaller and smaller pin pitch BGAs being introduced — with 0.8 mm pin pitch or...

Mentor Graphics PADS 9.0 with Update1

PADS®, Mentor Graphics’ world-leading desktop PCB design tool, enables you to develop PCBs within a highly productive, scalable, and easy-to-use environment. PADS solutions cover the spectrum of PCB development, from schematic entry to manufacturing preparation. But, unlike other products, we’re not ‘one-size-fits-all.’ With PADS you buy what you need. PADS Suites, available in three configurations, are our newest solutions, tailored to meet the design needs of each individual.product:Mentor Graphics PADS 9.0 with Update1 Lanaguage:english Platform:Winxp/Win7 Size:817MB

CST MicroStripes 2009.01 win32

CST MICROSTRIPES™ is a powerful 3D electromagnetic simulation tool, used extensively for solvingchallenging radiation problems including complex antenna structures, installed performance, EMC/EMI/E3issues and more.Users of CST MICROSTRIPES™ 2009 (CST MS) will find a modernized interface which has been greatlysimplified by merging the Build tool, model history and parameterization into the Project/Command Window,making it easier to run parameter sweeps and queue simulations. CST MS’ new tabbed toolbars de-clutter theuser interface and improve navigation through the tool. The icons have been completely re-designed to bemore intuitive and consistent with those used in CST STUDIO SUITE 2009, making it easier to transitionbetween the tools.Performance EnhancementsThe entire CST MS package including the Build tool, TLM solver and Field Plotter is now 64-bit enabled,extending the...

CST MicroStripes 2009.01 win64

CST MICROSTRIPES 2009.01 Win64 FUll Release now. CST MICROSTRIPES is a powerful 3D electromagnetic simulation tool, used extensively for solving challenging radiation problems including complex antenna structures, installed performance, EMC/EMI/E3 issues. CST MICROSTRIPES  is well-known for its compact modeling technology. In EMC/EMI applications, objects with relatively small dimensions, such as slots/seams, vents, multi-wires, shielded cables, have a big impact on the performance of the system. Compact modeling enables these critical features to be represented by equivalent transmission-line models; it is not necessary to use a fine mesh to capture the small dimensions. Unlike many modeling techniques, the compact models are fully integrated into the electromagnetic field solution. Compact modeling can reduce the computer requirements by several orders of magnitude. CST MICROSTRIPES ...

Tanner Tools 14

Tanner Tools 14 provides electronic design automation (EDA) software used by companies in a wide variety of industries. Its solutions enable designers to move rapidly from concept to silicon by enabling the design, layout, and verification of analog/mixed-signal ICs, ASICs, and MEMS. Tanner EDA solutions offer designers the perfect combination of price and performance to meet any design challenge. The company\’s solutions include tools for: Schematic Capture: S-Edit Simulation: T-Spice, W-Edit Physical Layout: L-Edit Verification: HiPer Verify, L-Edit Standard DRC, L-Edit LVS and more Parasitic Layout Extraction: HiPer PX, 2D and 3D parasitic layout extraction These scalable solutions have a range of applications in the biomedical, consumer electronics, next-generation wireless, imaging, power management, and RF market segments. Product:Tanner Tools 14...

EMIStream 3.1

EMIStream is the solution that can suppress undesirable electromagnetic radiation or electromagnetic interference (EMI) generated from printed circuit boards. HOW DOES EMIStream WORK?At the placement design stage (pre-routing), EMIStream examines optimal placement locations for parts by using imaginary routing and verifies the effects of the proposed EMI solution. EMIStream also can suppress resonance which occurs between the power and ground (GND) planes by analyzing the resonance which occurs by changing the locations of capacitors. By eliminating the causes of unnecessary electromagnetic radiation from the initial design stage, EMIStream substantially reduces the time and costs needed for revision after the prototype is developed and enables rapid time-to-market.Product:EMIStream 3.1 Lanaguage:english Platform:Winxp/Win7 Size:10MB

Mentor Graphics Calibre 2009.1_46 Linux

WILSONVILLE, OR–(Marketwire – May 27, 2010) – Mentor Graphics Corporation (NASDAQ: MENT) today announced that the Calibre® nmLVS product now provides comprehensive support for the iLVS interoperable rule specification used by TSMC for new design kits. This allows customers to define and customize complex IC design rules, as needed, while maintaining compliance with TSMC specifications and allowing seamless adoption of EDA vendor performance optimizations. The iLVS specification, which was co-developed by Mentor and TSMC, separates the rule definition syntax from underlying rule implementations. This allows Mentor to optimize the underlying implementation, reducing the need for users to tune the general rule specifications themselves. Moreover, by using iLVS in conjunction with the Calibre nmLVS Advanced Device Properties (ADP) facility, the Calibre...