EDA Design Page 194

Synplicity日前宣布，该公司已强化Synplify DSP解决方案，能进一步加速将DSP算法实现于芯片中。Synplify DSP软件是Synplicity的ESL合成平台，可提供包括高阶模块化(modeling)和硬件抽象(hardware abstraction)、能转为RTL的条件限制(constraint-driven)演算合成，以及为性能、门数和多信道化等特性提供系统性最佳化功能。 Synplify DSP软件的增加功能包括对M语言控制(M-Control)和向量链接库的支持，以及具有新增的功能区块，有助于无线通信、雷达和数字多媒体处理等先进应用的开发设计。除了这些加速演算设计的独特功能外，Synplify DSP工具特有的合成算法，号称能让设计横跨不同的组件工艺，同时也能达成最佳化的效能，协助用户容易地将DSP算法加入所选择的硬件平台当中。 Synplify DSP软件的最新版本支持M-Control功能，能使用M语言来提供精简的控制与状态机功能描述。在使用M语言来描述复杂的分支(branching)与逻辑陈述功能的状况下，设计工程师现在可以选用精简的形式来表达他们的算法。 M-Control已整合到Synplify DSP数据库和MathWorks的Simulink环境中，进而支持数据型式和取样速率继承(data type and sample rate inheritance)与传递(propagation)。为了支持断点(breakpoint)及转换成M程序代码，M-Control也提供了inline除错的功能。这些功能简化了一般被整合到DSP算法中的控制功能与验证。 Synplify DSP软件对其通信数据库做了许多更新，包括高阶DSP合成数据库、广泛的滤波(filtering)功能、数学和通信数据库，以及向量数据库支持等。通过这些新功能，用户可以将复杂的无线算法(例如WiMAX、802.11a/b/g/n和DVB等标准)快速地描述、验证以及实现到硬件当中。 Synplicity指出，向量支持使得数学与通信算法更容易描述和模拟。此外，向量支持亦可降低多信道无线算法和多天线算法所需投入的心力，这些应用包括MIMO、视频、雷达和安全应用等等。 Synplify DSP软件为Actel、Altera和赛灵思等多种FPGA技术提供延伸性的组件支持，其中包括赛灵思最新发表的Virtex-5 FPGA。可协助用户开发便携式和可延伸智财(IP)，并可容易地被应用到所选的FPGA架构中。 ::::::English Description:::::: Synplify DSP offers DSP hardware engineers and algorithm developers the most efficient way to get their algorithms into silicon for FPGAs and ASICs. Synplify DSP uses a unique DSP Synthesis technology that offers significant advantages over traditional design flows and competing DSP design tools. With a DSP modeling library that incorporates hardware abstraction and a powerful DSP synthesis engine, you can focus on algorithm behavior, eliminate the burden of hand coding architectural optimizations, and explore system-wide RTL area/speed optimizations automatically from a single algorithm model. This results in significantly faster time-to-market and achieves superior timing, area,...

::::::English Description:::::: The ARM® RealView® Compilation Tools are an integral part of the RealView Development Suite. One Tool Kit for all ARM DevicesARM is committed to producing tools with leading-edge performance and code size for all current and planned ARM processors. Because RealView Compilation Tools support the ARM processor architecture only, the compiler can perform optimizations early in the tool flow. This leads to more optimal code and shorter compilation time. The RealView Compilation Tools are the result of 20 years of research and development. They deliver the full set of software components required to build C and C++ applications targeting the 32-bit ARM and 16-bit Thumb® and Thumb-2 instruction sets. Leading-Edge DevelopmentThe RealView Compilation Tools are developed hand in hand with...

http://www.arm.com。 The ARM® RealView® Development Suite 3.1 Professional is a complete, end-to-end solution for software development supporting all ARM® processors and ARM CoreSight™ debug technology. This full-featured product enables developers to begin software development, optimization and test ahead of silicon availability, significantly reducing application time-to-market and ensuring the highest degree of software quality. RealView® Development Suite 3.1 Professional incorporates the best-in-class RealView Compilation tools and market-leading RealView Profiler enabling applications to easily achieve both high performance and optimal code size. The product includes support for the latest Cortex™-A8 processor and includes vectorizing compilation for the NEON™ media processing engine which can increase the performance of multimedia applications in standard C code by more than 200%. RealView Development Suite 3.1 Professional...

::::::English Description:::::: Code Composer Studio 3.3; (CCStudio) Development Tools are a key element of the eXpressDSP Software and Development Tools strategy from Texas Instruments. CCStudio delivers all of the host tools and runtime software support for your TMS320 DSP based real-time embedded application to market faster. Familiar tools and interfaces allow users to get started faster than ever before and add functionality to their application thanks to sophisticated productivity tools. CCStudio’s easy to use development environment allows DSP designers of all experience levels to move quickly through each phase of the application development process including design, code and build, debug, analyze and optimize. Kit Components The fully integrated development environment includes, real-time analysis capabilities, easy to use debugger, C/C++ Compiler,...

HI-TECH for dsPIC®/PIC24 v9.60PL2 Compiler for Microchips dsPIC Digital Signal Controller (DSC) range HI-TECH for dsPIC/PIC24 compiler offers the C programmer a powerful, yet easy-to-use environment for code development. HI-TECH for dsPIC/PIC24 Compiler Features: ANSI C, full featured and portable, supporting all standard data types (IEEE floating point, long data types, etc…) Reliable – based on mature, field-proven technology used in our PICC and PICC-18 compilers Unlimited number of source files Multiple optimization levels and types Comprehensive C library with all source code provided Mixed C and assembler programming Listings showing generated assembler Optimizing assembler Compatible – integrates into the MPLAB® IDE, MPLAB ICD2 and most 3rd-party development tools Runs on multiple platforms: Windows® (including 32-bit Vista), Linux®, UNIX® Integrated...

::::::English Description:::::: PICC-18 PRO v9.61 ANSI C COMPILER*, based on the reliable PICC-18 STD compiler, comes with: Omniscient Code Generation™ Extracts information from multiple source files simultaneously, allowing more intelligent state-of-the-art code generation that: Automatically handles memory banking without requiring special qualifiers; Optimizes the size of each pointer variable in your code based on its usage; Eliminates the need for many non-standard C qualifiers and compiler options; Produces more optimal interrupt context switching code; and Customizes the functionality of the included printf library function. This all means you can spend less time worrying about device memory requirements and compiler-specific semantics and more time focusing on your goals. * Can run on multiple platforms including Windows (does not include Vista), Linux...

。 ::::::English Description:::::: HI-TECH PICC™ v9.60PL1 is a high-performance C compiler for the Microchip PICmicro® 10/12/14/16/17 series of microcontrollers. HI-TECH PICC STD Compiler Features: ANSI C – full featured and portable Reliable – mature, field-proven technology Multiple C optimization levels An optimizing assembler Full linker, with overlaying of local variables to minimize RAM usage Comprehensive C library with all source code provided Includes support for 24-bit and 32-bit IEEE floating point and 32-bit long data types Mixed C and assembler programming Unlimited number of source files Listings showing generated assembler Compatible – integrates into the MPLAB® IDE, MPLAB ICD2 and most 3rd-party development tools Runs on multiple platforms: Windows (up to Vista64), Linux and Mac OS X HI-TECH PICC STD...

The third product in the process-aware design-for-manufacturing (PA-DFM) family is Fammos; the first special-purpose TCAD PA-DFM tool that analyzes stress evolution for the entire fabrication process of interconnects. Fammos performs 3D backend process simulations using design database and process recipes. With specialized algorithms for fast 3D structure construction, mesh generation, and equation solving, Fammos predicts interconnect stress distributions from multiple stress sources and accounts for proximity effects. Combining the best-in-class capabilities from Synopsys, Fammos is capable of detecting stress hot spots that are susceptible to debonding, voiding and cracking. It employs a set of physics-based models to evaluate reliability failures. Using the Sentaurus Workbench user interface, Fammos will facilitate technology explorations with parameterized input files and scheduled run splits. Benefits...

::::::English Description:::::: HDL Designer Linux delivers solutions optimizing the design creation, synthesis and verification processes of advanced ASIC and FPGA designs in a team environment. Comprehensive Design Creation & RTL Reuse Environment Any Silicon PLD, FPGA, Platform FPGA, Structured ASIC, ASIC Prototypes, ASICs and SOCs Any Vendor Actel, Altera, Atmel, ChipExpress, Lattice, Xilinx, plus any ASIC foundry Any Language VHDL, Verilog, SystemVerilog, C/C++, PSL Any Flow Integrated with all leading Simulation, Emulation & Formal solutions Integrated with all commercial synthesis and P & R environments Optimizing RTL Reuse Practical reuse (online demo) (datasheet) Optimizing The Design Process Cut design time in half: Rapid design development process Team productivity: Team design flow and version management Tune your competitive edge: Flow management...

::::::English Description:::::: HDL Designer delivers solutions optimizing the design creation, synthesis and verification processes of advanced ASIC and FPGA designs in a team environment. Comprehensive Design Creation & RTL Reuse Environment Any Silicon PLD, FPGA, Platform FPGA, Structured ASIC, ASIC Prototypes, ASICs and SOCs Any Vendor Actel, Altera, Atmel, ChipExpress, Lattice, Xilinx, plus any ASIC foundry Any Language VHDL, Verilog, SystemVerilog, C/C++, PSL Any Flow Integrated with all leading Simulation, Emulation & Formal solutions Integrated with all commercial synthesis and P & R environments Optimizing RTL Reuse Practical reuse (online demo) (datasheet) Optimizing The Design Process Cut design time in half: Rapid design development process Team productivity: Team design flow and version management Tune your competitive edge: Flow management and...