EDA Design Page 49

Mentor Graphics Tessent 2021.2 for linux Tessent DefectSim works with Mentor’s Eldo® and Questa® ADMS™ circuit simulators to measure the effects of opens, shorts, extreme variations, and user-defined defects modeled within a layout-extracted or schematic netlist. A number of techniques are used to reduce total simulation time by many orders of magnitude, compared to sequential simulation of every defect in a flat layout-extracted netlist, without reducing simulation accuracy or limiting the type of test. Among the techniques is a new statistical method called likelihood-weighted random sampling that minimizes the number of defects to simulate and more accurately indicates outgoing chip quality. Tessent DefectSim can also measure a circuit’s tolerance to defects. Defect tolerance is a measure of a circuit’s ability,...

AWR Design Environment with Analyst 16.0 AWR Design Environment A comprehensive electronic design automation (EDA) platform for developing RF/microwave products NI AWR Design Environment Advancing the Wireless Revolution The AWR Design Environment platform provides RF/microwave engineers with integrated high-frequency circuit (Microwave Office), system (VSS), and EM (AXIEM/Analyst) simulation technologies and design automation to develop physically-realizable electronics ready for manufacturing. The platform helps designers manage complex integrated-circuit (IC), package, and printed-circuit board (PCB) modeling, simulation, and verification, addressing all aspects of circuit behavior to achieve optimal performance and reliable results for first-pass success. Features at a Glance EXTRACT – Schematic-driven EM extraction technology/design flow Layout/Drawing Editor – 2D and 3D construction and views FEM Solver – Proprietary, full-wave direct and interative solvers Meshing Technology...

TannerTools.v2020.1 Mentor Graphics is a technology leader in electronic design automation (EDA), providing software and hardware design solutions that enable companies to develop better electronic products faster and more cost-effectively. The company offers innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. Mentor Graphics has the broadest industry portfolio of best-in-class products and is the only EDA company with an embedded software solution. product:TannerTools.v2020.1 Lanaguage:english Platform:Win7/WIN10 Size:1CD

Altium Designer 21.6.1 The Altium development team is pleased to announce the availability of exclusive preview of Altium Designer 21.0.3 Build 12 (beta) – the most powerful, modern, easy-to-use release to date. Altium Designer represents decades of innovation and development focused on creating a truly unified design environment — One that enables users to effortlessly connect with every facet of the PCB design process. With features that have pioneered change and an ever-growing community of users, advocates, educators, and experts, Altium Designer is truly transforming the industry and pushing the boundaries of what\’s possible. Experience the world\’s finest PCB design product for yourself and see why more Engineers and Designers choose Altium than any other product available. The Altium Beta...

Mentor Questa Formal 2021.1 KEY FEATURES Advanced Verilog Simulator The Questa Advanced Simulator achieves industry-leading performance and capacity through very aggressive, global compile and simulation optimization algorithms for SystemVerilog and VHDL. INDUSTRY-LEADING High Performance and Capacity Questa Advanced Simulation achieves industry-leading performance and capacity through very aggressive, global compile and simulation optimization algorithms of SystemVerilog and VHDL, improving SystemVerilog and mixed VHDL/SystemVerilog RTL simulation performance by up to 10X. Questa Verification Management provides a shared platform and environment for comprehensive verification management of design process, tools and data within a scalable, modular solution. MULTI-CORE SIMULATION High-performance, multi-language engine The Questa Advanced simulator supports all design languages and constructs, and either automatically or manually partitions the design to run in parallel...

cadence INNOVUS20.1 Key Benefits Massively parallel architecture for handling large designs and supporting multi-threading on multi-core workstations, as well as distributed processing over networks of computers New GigaPlace solver-based placement technology, which is timing, power, and congestion driven with topology-, pin-access-, and color-aware understanding to provide optimal placement, wire length, utilization, and PPA results Unique mixed-macro and standard-cell placement capability enabling automated macro locations for ever-increasingly complex floorplans with hundreds of macro cells Advanced GigaOpt multi-threaded, layer-aware optimization engine, which is timing and power driven to reduce dynamic and leakage power Additional advanced-node technologies, such as via pillars, power integrity-aware placement and optimization, clock skewing for power, continuous congestion monitoring, and optimized routers for handling self-aligned double patterning for better PPA...

Snopsys Saber 2020.03 Saber™ is a proven platform for designing, modeling and simulating physical systems, enabling full-system virtual prototyping for applications in analog/power electronics, electronic power generation/conversion/distribution, and system/wiring/harness design and mechatronics. Scalable Simulation Solution for Accelerating Power Electronics Design SaberEXP delivers the fastest simulation convergence for early power supply, converter and motor drive designs with seamless export flow into SaberRD for high-fidelity system designs Integrated Environment for Simulation and Modeling Comprehensive simulation requires the flexibility to model a wide range of component types at various levels of abstraction. Abstraction levels range from high-level architectural models to detailed behavioral models that mimic the physical attributes of the actual device.product:Snopsys Saber 2020.03 Lanaguage:english Platform:Win/Linux Size:1DVD

Synopsys STARRC 2020.09 StarRC product:Synopsys STARRC 2020.09 for linux Lanaguage:english Platform:Linux/Macosx Size:1DVD

Synopsys Synplify FPGA 2020 for linux Synplify Pro Logic Synthesis for FPGA Design Synplify Pro® FPGA synthesis software is the industry standard for producing high-performance and cost-effective FPGA designs. Synplify software supports the latest VHDL and Verilog language constructs including SystemVerilog and VHDL-2008. The software also supports FPGA architectures from a variety of FPGA vendors, including Altera, Achronix, Lattice, Microsemi and Xilinx, all from a single RTL and constraint source. Synplify Pro software uses a single, easy-to-use interface and has the ability to perform incremental synthesis and intuitive HDL code analysis. For designers of large designs that need the fastest possible synthesis runtimes and the highest quality timing, area and power results. Synplify® Premier software provides all of the features...

Snopsys PrimeTime 2020.09 for linux PrimeTime Static Timing Analysis The Golden Signoff Solution The PrimeTime® Suite delivers fast, memory-efficient scalar and multicore computing, distributed multi-scenario analysis and ECO fixing using POCV and variation-aware modeling. Synopsys\’ PrimeTime static timing analysis tool provides a single, golden, trusted signoff solution for timing, signal integrity, power and variation-aware analysis. It delivers PrimeSim™ HSPICE®  accurate signoff analysis that helps pinpoint problems prior to chip tapeout thereby reducing risk, ensuring design integrity, and lowering the cost of design. This industry gold-standard improves your team’s productivity by delivering fast turnaround to shave precious time from development schedules for large and small designs while ensuring first-pass silicon success through greater predictability and the highest accuracy. The solution is...