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EDA Design Page 199

AutoTRAX EDA 9.20

::::::English Description:::::: Do you want easy to use, reliable world-class professional PCB design software at a price you can afford with a money back guarantee? AutoTRAX gives you all you need to design your own PCBs from schematic capture, through simulation, layout and 3D visualization all the way to a finished board that you will be proud of. All without breaking the bank. Product:AutoTRAX EDA 9.20 Lanaguage:english Platform:Winxp/Win7 Size:21MB

Mentor Graphics Catapult Synthesis 2007b ESL

::::::English Description:::::: Catapult is for ASIC and FPGA hardware designers of portable wireless, video, and image processing equipment who need to deliver optimal implementations with aggressive time-to-market requirements. Catapult is a high-level synthesis tool that uses industry-standard ANSI C++ to generate correct-by-construction, high-quality RTL 10-100x faster than other methods. Unlike traditional RTL design methodologies, Catapult enables the designer to pick the best architecture for given performance/area/power requirement and avoids the design errors introduced from hand coding the RTL description. product:Mentor Graphics Catapult Synthesis 2007b ESL Lanaguage:english Platform:Winxp/Win7 Size:110MB

Vector Fields Concerto 6.0

::::::English Description:::::: Concerto 6 is an advanced analysis package for RF and Microwave design. It includes a 3D Geometric Modeler that allows easy data import from CAD systems, as well as the facility to create and parameterize new models. There are a number of modules available, incorporating different analysis techniques, and including low cost entry level products. All modules include the 3D Geometric Modeler as standard – making it easy to transfer data, as well as upgrading to other modules. Concerto reputation for fast and accurate computation of em fields is acknowledged by independant experts as the most suitable for RF and microwave design. Concerto includes the following modules: Concerto AS: Introducing Low Cost Solution for Coaxial Connector Design The FDTD...

Agilent IC-CAP 2006 Win

About IC-CAPIC-CAP (integrated circuitcharacterization and analysisprogram) is device modelingsoftware that provides powerfulcharacterization and analysiscapabilities for today’s semiconduc-tor modeling. IC-CAP offers deviceengineers and designers a state-of-the-art modeling tool that fillsnumerous modeling needs, includ-ing instrument control, data acquisi-tion, parameter extraction, graphicalanalysis, simulation, optimization,and statistical analysis. All of thesecapabilities are combined in aflexible, automated, and intuitivesoftware environment for efficientand accurate extraction of activedevices and circuit model param-eters. IC-CAP provides the power tobuild model libraries for AdvancedDesign System (ADS) or other com-mercial simulators.Features at a glance• complete automated hardware and• efficient, open and flexible softwaresoftware integrationenvironment and extraction• fast links to ADS simulatorsmethodologies• unique boundary models for realistic• DC to RF extraction routines forworst-case modelingstate-of-the-art industry standard models• worldwide training and support• unique nonlinear...

SynaptiCAD AllProducts 12.09b Linux

:::::English Description::::::   Want a powerful, yet easy to use simulation environment SynaptiCAD s simulation and debugging tools provide a standard interface for controlling all of your simulation tools. SynaptiCAD s timing diagram editors have the most extensive and accurate timing analysis features available in any timing diagram editor on the market including delay correlation, reconvergent fan-out, and clocks that model jitter and buffer delays. Three different levels of editing let you pick the best price and feature set for your application.   Free yourself from the time-consuming process of manually writing Verilog, VHDL, and SystemC test benches. Generate them graphically from timing diagrams. SynaptiCAD provides 3 levels of test bench generation to meet all your design needs. SynaptiCAD offers...

Mentor Graphics TPD translators

Mentor Graphics TPD translators能够提供PCB 文件和 从Cadstar, OrCad, PCAD or Protel 的footprint libraries到PADS的转换。 ::::::English Description:::::: Mentor Graphics TPD translators Provides translation for PCB Layout files and footprint libraries from Cadstar, OrCad, PCAD or Protel to PADS Layout. product:Mentor Graphics TPD translators Lanaguage:english Platform:Winxp/Win7 Size:26MB

Mentor.Graphics PEX 2007

::::::English Description::::::  Mentor Graphics PADS Layout to Expedition Translators 2007  enable PADS files to Expedition files.product:Mentor.Graphics PEX 2007 Lanaguage:english Platform:Winxp/Win7 Size:25MB

Mentor Graphics I/O Designer 7.2 Linux HDL

::::::English Description:::::: Mentor Graphics I/O Designer provides bi-directional integration, data management and the ability to perform concurrent design of your FPGA and PCB. Focused on optimizing system performance, designer productivity and reducing product manufacturing costs, I/O Designer eliminates the barriers between FPGA and PCB flows and design organizations.product:Mentor Graphics I/O Designer 7.2 Linux HDL Lanaguage:english Platform:Winxp/Win7 Size:94MB

Xilinx ChipScope pro 9.2.03i SOLARIS

hipScope™ Pro tool inserts logic analyzer, system analyzer, and virtual I/O low-profile software cores directly into your design, allowing you to view any internal signal or node, including embedded hard or soft processors. Signals are captured in the system at the speed of operation and brought out through the programming interface, freeing up pins for your design. Captured signals are then displayed and analyzed using the ChipScope Pro Analyzer tool. The ChipScope Pro tool also interfaces with your Agilent Technologies bench test equipment through the ATC2 software core. This core synchronizes the ChipScope Pro tool to Agilent’s FPGA Dynamic Probe add-on option. This unique partnership between Xilinx and Agilent gives you deeper trace memory, faster clock speeds, more trigger options,...

Xilinx ChipScope Pro 9.2.03i Linux

Leading-edge, real-time debug and verification tools for Xilinx FPGAs enabling on-chip debug at or near operating system speed The complexity of today\’s state-of-the-art FPGAs make it nearly impossible to debug designs using traditional logic analysis methods. Flip-chip and ball grid array packaging don’t have exposed leads for physical probing. Xilinx has the solution: ChipScope Pro. ChipScope Pro inserts logic analyzer, bus analyzer, and Virtual I/O low-profile software cores into your design. These cores allow you to view all the internal signals and nodes within your FPGA, including the IBM CoreConnect Processor Local Bus or On-Chip Peripheral Bus supporting the IBM PowerPC 405 inside the industry-leading Virtex-II Pro FGPA. Signals are captured at or near operating system speed and brought out...