EDA Design Page 165

Filter Solutions, Filter Light, and Filter Free are comprehensive PC windows based filter synthesis and analysis software packages for lumped, distributed, active, switched capacitor, and digital filters. Filter Free is the freeware version with minimal functionality. Filter Light is the low cost version with expanded capabilities over Filter Free, and Filter Solutions is the fully functional version. Filter Light is the low cost version of Filter Solutions.Filter Solutions supports tall of the features of Filter Light plus many advanced features. Filter Light and Filter Solutions support the following desirable features: General: Filter Light and Filter Solutions: * Gaussian, Bessel, Butterworth, Legendre, Chebyshev Type I, Chebyshev Type II, Hourglass, Elliptic, Raised Cosine, Matched and Delay filters. * Low Pass, High Pass,...

SMC and Synopsys Collaborate to Validate Galaxy Custom Designer Solution with TSMC 28nm iPDK MOUNTAIN VIEW, Calif., June 9 /PRNewswire-FirstCall/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has collaborated with TSMC to validate Synopsys\’ custom design solution with TSMC\’s 28-nanometer (nm) interoperable process design kit (iPDK) and Analog/Mixed-Signal (AMS) Reference Flow 1.0. TSMC\’s 28nm reference phase-locked loop (PLL) design was used to validate Synopsys\’ comprehensive custom solution while demonstrating productivity-enhancing capabilities of the TSMC AMS Reference Flow 1.0. The validated solution from Synopsys includes the Galaxy Custom Designer® implementation, HSPICE® circuit simulation, CustomSim™ FastSPICE simulation, StarRC™ parasitic extraction and IC Validator physical verification solutions. Through...

Galaxy Custom Designer™ LE is the modern-era choice for layout entry and editing, enabling users to meet the challenges of today\’s fast-moving nanometer designs with little or no learning curve. As with all Custom Designer tools, layout editing tasks are accomplished with fewer clicks, quicker menu access, and less pop-up menu clutter. Architected from the ground up with maximum productivity in mind, Custom Designer LE enables ultra-fast layout editing with advanced P-cell support and time-saving layout automation through capabilities like intelligent multipart paths that maintain DRC correctness. An integral component of the full Custom Designer system, LE provides transistor-level layout and editing capabilities in a unified platform for both cell-based and mixed-signal custom content which speeds complex chip design and...

Cadence Encounter RTL Compiler 9.1 Linux allows engineers to look across the entire design as they employ concurrent optimization techniques, such as making tradeoffs among timing, area, and power. To maximize performance, decrease die size, reduce power consumption, and boost productivity, designers need a global synthesis solution that enables concurrent optimization of timing, area, and power. Encounter RTL Compiler, a key component of the Cadence Logic Design Team Solution, delivers production-proven global synthesis for faster, smaller, and low-power chips in less time. With its unique set of patented global-focus algorithms, combined with new physically-aware optimization and analysis, Encounter RTL Compiler cuts design time while ensuring the highest quality of silicon. Features/Benefits A well-balanced logic structure isolates critical paths and reduces power,...

Mentor Graphics Calibre 2009.3_15 Linux Release! Calibre® is the overwhelming market share leader and the industry standard for IC physical verification, due to the outstanding performance, accuracy and reliability of Calibre products. Over the last two years, Calibre nmDRC™ has reduced average DRC runtime by a factor of five, while Calibre\’s innovative Hyperscaling and MTFlex™ technologies have cut memory requirements in half. Calibre nmDRC also reduced overall cycle time with incremental DRC, which allows designers to make DRC runs in parallel. As DRC violations are reported, designers can immediately fix and recheck just the affected areas, while the initial DRC run continues. To handle complex and multi-variate, multi-dimensional checks that are not adequately addressed by traditional design rules, Calibre nmDRC\’s...

Agilent Systemvue 2009.08 Win is a focused electronic design automation (EDA) environment for electronic system-level (ESL) design. It enables system architects and algorithm developers to innovate the physical layer (PHY) of wireless and aerospace/defense communications systems and provides unique value to RF, DSP, and FPGA/ASIC implementers. As a dedicated platform for ESL design and signal processing realization, SystemVue replaces general-purpose digital, analog, and math environments. SystemVue speaks RF, cuts PHY development and verification time in half, and connects to your mainstream EDA flow. Key Benefits of SystemVue   Best-in-class RF fidelity among today’s baseband/PHY environments – allows baseband designers to virtualize the RF and eliminate excess margin Superior integration with Test accelerates real-world maturity and streamlines your model-based design flow,...

Infolytica Releases Update to MagNet v7 Infolytica Corporation announced today the latest release of MagNet version 7 is now available. The update includes several new features and general improvements to the company’s electromagnetic field simulation software. These include additional support for multicore processors and modeling nonlinear surface impedances. The company has previously announced the updated MagNet v7 will include new capabilities for simulating the magnetization of a permanent magnet. Further improvements to Multicore Processing MagNet v7 introduced new parallel computing 3D solvers which are optimized to take full advantage of multicore processors. For computational intensive design problems, the simulation time is reduced significantly due to better management of the cores. The new release expands on the software’s support for multicore...

POWER 4-5-6 is the world\’s only comprehensive power supply design software. Features Power-Stage Designer  Magnetics Designer with core library Control Loop Designer Current-Mode and Voltage-Mode Designer and analysis with most advanced & accurate models Nine power topologies for all power ranges True transient response for step loads CCM and DCM operation simulated exactly Stress and loss analysis for all power components Fifth-order input filter analysis of stability interaction Proprietary high-speed simulation outperforms any other approach  Second-stage LC Filter Designer Snubber Designer  Magnetics Proximity Loss Designer Semiconductor Switching Loss Designer Micrometals Toroid Designer Design Process Interface accelerated and enhanced   Product:POWER 4-5-6 Plus 7.23 Lanaguage:English Platform:/WinNT/2000/XP Size:26MB

Remcom announces XFdtd 7.0 (XF7) training October 5-7, 2009 in Reston, Virginia, just outside of Washington DC. The training will teach current XFdtd users how to transition projects to XF7 and maximize productivity using the most advanced tools Remcom has to offer. In addition, anyone is welcome to attend to learn how XF7’s new features can speed design time in the development cycle. Whether currently using XFdtd or not, all attendees can expect to gain the following from the course: * Most efficient ways to use Remcom software and maximize productivity. * Overview of the wide array of problems Remcom’s products help to solve. * Coverage of new features and updates and how they benefit workflow. * Personalized consultations with...

The Synplify DSP tool provides a unique high-level synthesis methodology that realizes significant productivity and portability advantages. System and algorithm designers can quickly capture complex algorithmic behavior using the Synplify DSP library. The Synplify DSP synthesis engine allows designers to automatically implement and explore area/speed optimized RTL implementations from a single model. This eliminates the burden of hand-coding functions and architectural optimizations and results in significantly faster design capture, speeds time-to-market, and enables rapid design exploration for improved quality and lower cost.Product:Synopsys Synplify FPGA 2009.06 SP1 Linux Lanaguage:english Platform:Winxp/Win7 Size:516MB