EDA Design Page 143

CustomExplorer™ and Custom WaveView™ form a comprehensive transistor-level debugging environment for analog, mixed-signal and SoC designs. CustomExplorer provides a host of tools for navigating transistor-level designs and verifying simulation results. Download Datasheet IntroductionCustomExplorer is tightly integrated with Custom WaveView, enabling customizable waveform analysis. Custom WaveView provides powerful tools for displaying waveforms, performing calculations and making measurements (see Figure 1). Together, these tools aid designers in rapidly performing customized advanced analyses in a highly-productive design debugging and waveform analysis environment. CustomExplorer Design BrowsersThe Design Browsers allow quick access to the most complex hierarchy design data. After loading a netlist or simulation results, the user can probe the design’s hierarchy by expanding the Lint, File, Deck, Flat or Output View tabs. These...

NanoSim™ is the cornerstone of Synopsys’ comprehensive mixed-signal verification solution, Discovery AMS. NanoSim is an advanced transistor-level circuit simulation and analysis tool for analog, digital and mixed-signal design verification. It is a robust and easy to use solution, with very high simulation throughput and capacity for multi-million transistor SoC’s and accuracy for designs at 90 nanometer and below. Key Benefits * Provides high accuracy for designs at 90 nanometer and below * Simulation speeds up to orders of magnitude faster than SPICE * Capacity to simulate large memory and SoC designs, e.g. 512 Mb DRAM with 1 Billion elements * Provides flexibility to trade-off accuracy versus performance * Seamless integration with parasitic extraction tool, Star-RCXT for efficient post-layout simulation *...

Tessent combines features of deterministic scan testing, embedded pattern compression, built-in self test, specialized embedded memory test and repair, and boundary scan, as well as board and system-level test technologies. Comprehensive SolutionThe Tessent product suite provides comprehensive silicon test and yield analysis solutions that address the challenges of manufacturing test, debug, and yield ramp for today’s SoCs. Built on the foundation of the best-in-class solutions for each test discipline, Tessent brings them together in a powerful test flow that ensures total chip coverage. Tessent™ Memory Test solutions provide the industry’s most advanced memory self-test and repair capabilities. Key features include comprehensive test and diagnostic capabilities to address the quality requirements of new process nodes and memory designs as well as...

Quartus® II software v10.1, the industry\’s number one software in performance and productivity for CPLD, FPGA, and HardCopy® ASIC designs, is available for download. The latest version introduces Qsys, a powerful new system-integration tool. Qsys, available in beta in Quartus II Subscription Edition software v10.1, saves time and effort in the FPGA design process by enabling faster system development and design reuse. Quartus II software v10.1 supports Altera’s new MAX® V CPLD family and the Arria® II GZ FPGA family, and provides expanded support for the Stratix® V FPGA family. The software continues to deliver new productivity features and enhancements, including an updated ModelSim®-Altera® Edition simulProduct:ALTERA QUARTUS II v10.1 Lanaguage:english Platform:Winxp/Win7 Size:4.36 GB

The Synplify solution is a high-performance, sophisticated logic synthesis engine that utilizes proprietary Behavior Extracting Synthesis Technology (B.E.S.T.) to deliver fast, highly efficient FPGA and CPLD designs. The Synplify product takes Verilog and VHDL Hardware Description Languages as input and outputs an optimized netlist in most popular FPGA vendor formats.New Release Also Delivers DesignWare Library IP Support for Production FPGA Designs 2010.09 Release Highlights: — Up to 4X synthesis runtime improvement — New global placer for quality of results improvements on existing designs — New team-design feature for concurrent design development — New support for DesignWare Library datapath and building block components for FPGA Implementation and ASIC Prototyping MOUNTAIN VIEW, Calif., Sept. 27 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a...

Mentor Graphics Corporation (Nasdaq: MENT) today announced the availability of Calibre® xRC™ and Calibre xL rule decks for TSMC’s advanced 65nm process node. These rule decks provide advanced modeling capabilities including process sensitivity, and self and mutual inductance. Calibre now provides a solution for many types of integrated circuit designs including analog, digital, mixed signal, and memory. For nanometer designs, accurate simulation and analysis requires more than traditional resistance and capacitance. Designers need a post-layout silicon model that incorporates inductance, process sensitivity effects, and efficient accounting of effects not captured in the device model. Using Calibre xRC and Calibre xL in the design flow helps ensure that designers have all the data they need to obtain successful first pass silicon....

Third-Party Verification IP Qualified with Questa WILSONVILLE, Ore., May 8, 2006 – Mentor Graphics Corporation (Nasdaq: MENT) today announced the Questa™ Vanguard Program (QVP), a partnership with industry-leading companies to enhance the verification options for Questa users and build a strong and comprehensive SystemVerilog ecosystem. The Questa Vanguard Program extends Mentor Graphics breadth of verification technologies through partnerships with other industry-leading companies that provide verification related tools and methods, verification IP, conversion services, training and consulting. Through these technology alliances and strategic partnerships, Mentor Graphics leverages resources and technical expertise to deliver even greater value to Questa users, including strong product integration with other Mentor Graphics technologies (see news release \”Mentor Graphics Delivers the Next Generation of Functional Verification,\” May...

New Fast Envelope in MMSIM10.1 is *Really* Fast and Accurate! Fast envelope analysis technology uses an accelerated mathematical representation to reduce the computational complexity * The circuit is automatically calibrated and replaced by an accelerated mathematical representation without the designer\’s intervention. * Simulation completes in minutes, independent of the designer’s specified stop time. * Good compromise between computational efficiency and accuracy. Simulations that used to take days now take hours or minutes with no loss in accuracyA new multi-threading capability has greatly improved simulation speed for RF Designers! * In MMSIM7.2, we introduced APS for Harmonic Balance analyses (multi-threaded harmonic balance simulation). * In MMSIM10.1, we added support for APS in Shooting PSS and small signal analyses (multi-threaded shooting pss...

Process and Device Simulation Tools Technology Computer-Aided Design (TCAD) refers to the use of computer simulations to develop and optimize semiconductor processing technologies and devices. Synopsys TCAD offers a comprehensive suite of products that includes industry leading process and device simulation tools, as well as a powerful GUI-driven simulation environment for managing simulation tasks and analyzing simulation results. The TCAD process and device simulation tools support a broad range of applications such as CMOS, power, memory, image sensors, solar cells, and analog/RF devices. In addition, Synopsys TCAD provides tools for interconnect modeling and extraction, providing critical parasitic information for optimizing chip performance.Technology Computer-Aided Design (TCAD) refers to the use of computer simulations to develop and optimize semiconductor processing technologies and...

Simics creates agility in your development process which directly impacts your time-to-market. By using virtual hardware which is available before your target hardware is available, your software teams can begin software development much earlier than is typical.Speed Development, Debug and Integration Simics is an ideal platform for software developers — both at the board bring-up level and the software application level. At the board bring up level, Simics provides early access to virtual hardware to allow developers to have drivers, BSPs, and RTOS\’s ready to go when physical hardware arrives. In addition, debugging this type of code can often be challenging because developers don\’t have access to internal states and registers of hardware devices. Simics provides visibility and control of...