EDA Design Page 139

SystemVue is a focused EDA environment for electronic system-level (ESL)design that allows system architects and algorithm developers to innovatethe physical layer (PHY) of next-generation wireless and aerospace/defensecommunications systems. It provides unique value to RF, DSP and FPGA/ASICimplementers who rely on both RF and digital signal processing to deliver thefull value of their hardware platforms. SystemVue replaces general-purpose analog, digital and math environments byoffering a dedicated platform for ESL design and signal processing realization.SystemVue “speaks RF,” cuts PHY development and verification time in half, andconnects to your mainstream EDA flow. Key benefits • Best-in-class RF fidelity among today’s baseband/PHY environments, whichallows baseband designers to virtualize the RF and eliminate excess margin • Superior integration with test accelerates real-world maturity and streamlinesyour...

he development of this version of JMAG-Designer implements various features aiming to improve performance as an experiment and evaluation device by advancing the analysis capabilities while reducing the work required by the user for a more efficient analysis process and ease of use. Features that were only available in JMAG-Studio previously have been built into JMAG-Designer while also improving their usability. These features allow each analysis to be performed more efficiently while reassuring anyone using JMAG-Studio that JMAG-Designer not only satisfies their needs, but exceeds their expectations. Don\’t hesitate to try and evaluate JMAG-Designer yourselfNew JMAG-RT Features The features of JMAG-RT, a model-based design solution, have been enhanced based on the requests of our users. * Account for iron loss...

– NI LabVIEW 2011 Control Design and Simulation Module– NI LabVIEW 2011 Database Connectivity Toolkit –– NI LabVIEW 2011 Datalogging and Supervisory Control Module– NI LabVIEW 2011 FPGA Module – NI LabVIEW 2011 Internet Toolkit – NI LabVIEW 2011 MathScript RT Module – NI LabVIEW 2011 Mobile Module – NI LabVIEW 2011 PID and Fuzzy Logic Toolkit – NI LabVIEW 2011 Real-Time Module –LabView – NI LabVIEW 2011 Report Generation Toolkit for Microsoft Office –– NI LabVIEW 2011 Robotics Module – NI LabVIEW 2011 Statechart Module– NI LabVIEW 2011 Touch Panel Module – NI LabVIEW 2010 VI Analyzer Toolkit п– NI Sound and Vibration Measurement Suite 2011– NI Vision Acquisition Software 2011 – NI Vision Development Module 2011 – Vision–...

Xilinx introduced the ISE Design Suite software to enable breakthrough optimizations for power and cost with greater design productivity. For the first time, ISE design tools deliver \’intelligent\’ clock-gating technology that reduces dynamic power consumption by as much as 30 percent. The new suite also provides advances in timing-driven design preservation, AMBA 4 AXI4-complaint IP support for plug-and-play design, and an intuitive design flow with fourth-generation partial reconfiguration capabilities that lowers system cost for a broad range of high performance applications. With full production support for all Xilinx Virtex-6 and Spartan-6 FPGA families, the ISE release continues its evolution as the industry\’s only domain-specific design suite with interoperable design flows and tool configurations for logic, digital signal processing (DSP), embedded...

Cadence Encounter Timing System With Encounter® Timing System, designers benefit from a consistent, integrated, multi-CPU–enabled, static timing analysis (STA) environment for place-and-route optimization and signoff verification, leading to faster design closure and better flow convergence. To boost productivity, Encounter Timing System helps designers quickly analyze and debug multimillion-gate designs while ensuring that design intent is preserved. Global timing debug pinpoints the root cause of timing and constraint issues at the push of a button. Sophisticated delay calculation ensures accuracy and performance. Using the effective current source model (ECSM) for advanced timing, power, signal integrity (SI), and statistical delay modeling, Encounter Timing System delivers the most accurate prediction of actual silicon performance. With a competitive edge over traditional delay modeling, designers...

Complex Analog/Mixed-Signal System-on-Chip Designs Questa ADMS gives designers a comprehensive environment for verifying complex analog/mixed-signal System-on-Chip designs. ADMS combines four high performance simulation engines in one efficient tool: Eldo® for general purpose analog simulations, Questa® for digital simulations, ADiT™ for fast transistor-level simulations and Eldo RF for modulated steady state simulation. Analog and mixed-signal SoC designs combine analog and digital content more tightly than ever before. They increasingly depend on integrated analog blocks such as A to D and D to A converters, phase-locked loops, and adaptive filters. This increased level of integration puts tremendous pressure on designers. Traditional design tool flows force designers to develop analog and digital subsystems in isolation, delaying the integration of these components until IC...

Computer Simulation Technology (CST), a world leader in the computer simulation of radiated emissions and susceptibility, announces major workflow improvements for EMC simulation at IEEE EMC 2010.CST\’s complete technology for 3D EM simulation will be further enhanced by tighter integration of CST CABLE STUDIO(tm) (CST CS) and the CST MICROWAVE STUDIO(r) (CST MWS) TLM solver in CST STUDIO SUITE(tm) 2011. Users of CST STUDIO SUITE 2011, interested in the analysis of radiated emissions and susceptibility, will benefit from a single unified environment for all EMC related modeling tasks, including greatly simplified model set up and simulation. The CST MWS TLM solver (Microstripes) and CST CS provide powerful features for real world EMC analysis including coupled simulations which enable large system...

Complete Set of Tools and CAD Support LP Wizard is a complete set of tools for building and managing your CAD library and documentation. LP Wizard is the only CAD library generation tool officially approved by IPC to match the IPC-7351B standard. A full featured 10-day evaluation version is available. LP Wizard supports Expedition Enterprise, PADS Layout, Board Station, Allegro, OrCAD PCB Editor, and any other CAD tool that supports PADS ASCII import.Build Library Parts Quickly and Easily Flexible template based component families make it incredibly easy to build accurate lead-free ROHS CAD library parts. Starter library comes with 10,000 different component packages including 5,000 connectors in a CAD neutral format that can be easily translated to your personal CAD...

Catapult C Synthesis Overview Reduce the Time to Verified RTL Traditional hardware design methods that require hand-written RTL development and debugging are too time-consuming and error prone for today’s complex designs. Catapult C Synthesis empowers designers to use industry standard ANSI C++ and SystemC to describe functional intent and move up to a more productive abstraction level. From these high-level descriptions, Catapult C Synthesis generates production quality RTL. Synthesizes ANSI C++ and SystemC to production quality RTL Targets algorithms, control-logic and interfaces for full-chip synthesis Dramatically shortens the path to verified RTL Making ESL Design and Verification a Reality Web Series: Join us for a for a series of complimentary web seminars that explores the many dimensions of ESL design,...

dvanced Technology Meets the needs of mid-sized to large electronics companies with complex PCB designs Eliminates the burden of managing multiple tools, with its common database and user interface Supports globally dispersed design teams with real-time collaboration Maintains data integrity – from concept to manufacturing Reduces design cycle time and manufacturing costs, while increasing productivity Integration As an Expedition Enterprise project evolves from concept to finished product, the database is always synchronized, notifying the engineer and designer of changes as they occur, eliminating unnecessary and costly design iterations. Expedition Enterprise is integrated with DMS™ (Data Management System) and CES (Constraint Editing System), providing a central infrastructure for component libraries, design data versioning and management, design reuse, where used, entry and...