EDA Design Page 111

Version 15.0.15Build: 41991 Date:16 March 20154720 Releasing a managed project to Altium Vault for a second time no longer reports aRelease.Log error.5205 Resolved issue where changes made to an Output Job from the Configuration Manager are notsaved (BC:5258).4999 Intermediate files no longer be removed during synthesis.5111 Improved stability of Allegro importer when working with large designs.5257 Resolved issue where running an FSO on pins from multiple parts results in none beingselected.5258 Resolved issue when deleting multiple sub parts of a component in the schematic libraryeditor, the selected components aren\’t always the ones that are deleted (BC:4768).5260 Special strings with parameters containing \”-\” or \”.\” symbols are now processed properly.5262 Re-annotate works properly now for components initially placed on the PCB.5264...

Si9000e supports roughness for both drum and treated side copper The Si9000e PCB controlled impedance frequency-dependent boundary element field solver combines powerful impedance calculation over a wide range of structures and unprecedented ease of use: Links with Speedstack as Speedstack Si Inbuilt impedance graphing Graphs conductor, dielectric and insertion loss At-a-glance comprehensive S-parameter charting — magnitude, phase and Smith charts Single-ended and Mixed-mode S-parameters charting and data tables User defined S-parameter source and termination impedance Frequency dependent modeling down to 1KHz Go/no go via stub check. With its fast, accurate, frequency-dependent transmission line modeling, the new Si9000e is designed to model transmission line loss, impedance at given frequencies and extract full transmission line parameters over a wide range of popular...

The QualNet® communications simulation platform (QualNet) is a planning, testing and training tool that \”mimics\” the behavior of a real communications network. Simulation is a cost-effective method for developing, deploying and managing network-centric systems throughout their entire lifecycle. Users can evaluate the basic behavior of a network, and test combinations of network features that are likely to work. QualNet provides a comprehensive environment for designing protocols, creating and animating network scenarios, and analyzing their performance. QualNet is composed of the following components: QualNet Architect — A graphical scenario design and visualization tool. In Design mode, you can set up terrain, network connections, subnets, mobility patterns of wireless users, and other functional parameters of network nodes. You can create network models...

CST STUDIO SUITE 2015 CST is pleased to announce the 2015 version of its flagship electromagnetic simulation software CST STUDIO SUITE®. The result of years of research and development, CST STUDIO SUITE 2015 includes improvements and innovations at every level, from the optimized solver technology to the user interface and integration with other tools.CST STUDIO SUITE The electromagnetic simulation software CST STUDIO SUITE® is the culmination of many years of research and development into the most accurate and efficient computational solutions for electromagnetic designs. It comprises CST’s tools for the design and optimization of devices operating in a wide range of frequencies – static to optical. Analyses may include thermal and mechanical effects, as well as circuit simulation.Image preview: CST...

Release 2015a includes: New releases of MATLAB and Simulink, with new Simulink graphical controls and displays Four new products: Antenna Toolbox, Robotics System Toolbox, Simulink Test, and Vision HDL Toolbox Updates to 79 other products MATLAB Integration of documentation for custom toolboxes into the MATLAB® Help Browser Scale mapreduce algorithms to MATLAB Distributed Computing Server™ for data-intensive applications Support for Arduino Leonardo and other Arduino boards MATLAB Compiler Includes capability to create add-ins for Microsoft® Excel® desktop applications MATLAB Compiler SDK Extension to MATLAB Compiler™ for creating C/C++, Java®, and .NET shared libraries, as well as a development framework for MATLAB Production Server™ Statistics and Machine Learning Toolbox Classification Learner app for training models and classifying data using supervised machine...

Formality and Formality Ultra Verifies the toughest designs synthesized with DC OverviewFormality® is an equivalence-checking (EC) solution that uses formal, static techniques to determine if two versions of a design are functionally equivalent. The size and complexity of today’s designs, coupled with the challenges of meeting timing, area, power and schedule, requires that the newest, most advanced synthesis optimizations be fully verifiable. Formality supports all DC Ultra and Design Compiler Graphical optimizations and so provides the highest quality of results that are fully verifiable. Formality supports verification of power-up and power-down states, multi-voltage, multi-supply and clock gated designs. Formality Ultra adds innovative matching and verification technologies to efficiently guide designers through the implementation of functional ECOs with minimal impact to...

TetraMAX ATPG Automatic Test Pattern Generation OverviewTetraMAX® ATPG automatically generates high quality manufacturing test patterns. It’s the only ATPG solution optimized for a wide range of test methodologies and integrated with Synopsys’ patented DFTMAX™ and DFTMAX Ultra, the leading test synthesis tools. The unparalleled ease-of- use and high performance provided by TetraMAX ATPG allows RTL designers to quickly create efficient, compressed test patterns for even the most complex designs. Download Datasheet Key Benefits Improves product quality with comprehensive fault model support and power-aware test patterns Increases designer productivity by leveraging integration with Synopsys test compression tools Generates test patterns for even the largest and most complex SoCs Enables faster yield ramp by quickly isolating defect locations Features Extremely high capacity...

Comprehensive Place and Route System OverviewIC Compiler is the leading place and route system. A single, convergent, chip-level physical implementation tool, it includes flat and hierarchical design planning, placement, clock tree synthesis, routing and optimization, manufacturability, and low-power capabilities that enable on schedule delivery of advanced designs at all process nodes. IC Compiler is the industry leading place-and-route system for established and emerging process technology node designs. Multicore support throughout the flow delivers improved productivity. New technologies, like concurrent clock and data (CCD) with clock concurrent optimization, PrimeTime physically-aware engineering change order (PT-ECO) guidance with minimum physical impact implementation, and golden unified power format (IEEE 1801 UPF), enable designers to handle gigascale design complexity and meet tight project schedules. IC...

The leading CAM solution for rigid multilayer PCBs With over 8500 seats worldwide, Genesis 2000 is the leading PCB pre-production CAM system, integrating design analysis with automatic data optimization to deliver precise PCB tooling data with unparalleled accuracy and speed. Integrates design analysis, planning, tooling, and workflow management. Cuts cycle time and increases yields through extensive plug-in DFM programs. Synchronizes communication between design and assembly. Easy integration with engineering and production. Genesis 2000 provides optimized CAM via full pre-production automation for PCB fabricators. Extensive plug-in DFM programs cut cycle time and increase yields dramatically. A true CAD/EDA download, fully translated into ODB++, complemented by seamless integration with all system modules and third-party programs, ensures timely and accurate processing of bare...

Cadence Design Systems, Inc. announce hotfix version 013 for 16.60 release. This update includes some critical bug fixes. Cadence Design Systems, Inc., a leader in global electronic design innovation, launched the Cadence OrCAD 16.6 design solution with new features, enhanced customization capabilities, and 20 percent simulation performance improvements that provide customers a shorter, more predictable path to product creation. This latest release offers numerous improvements to tool usability and performance, but at the heart of 16.6 are three key benefits: enhanced miniaturization capabilities, timing-aware physical implementation and verification for faster timing closure, and the industry’s first electrical CAD team collaboration environment for PCB design using Microsoft SharePoint technology. A hot fix is a software maintenance package containing a small number...