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TetraMAX® ATPG automatically generates high quality manufacturing test patterns. It\’s the only ATPG solution optimized for a wide range of test methodologies and integrated with Synopsys\’ patented DFTMAX™ compression the leading test synthesis tool. The unparalleled ease-of-use and high performance provided by TetraMAX ATPG allows RTL designers to quickly create efficient, compact tests for even the most complex designs. PDFDownload Datasheet Key Benefits * Increases product quality with power-aware test patterns for high defect detection * Reduces testing costs through the use of advanced pattern compaction techniques * Increases designer productivity by leveraging integration with Synopsys DFTMAX compression * Creates tests for complex and multi-million gate designs Features * Extremely high capacity and performance * Multicore support for accelerated run...

Cadence FINALE 6.1 Linuxproduct:Cadence FINALE 6.1 Linux Lanaguage:english Platform:Winxp/Win7 Size:544MB

ICEM Surf provides breakthrough technology enabling users to produce world-class aesthetic products in today\’s competitive, global markets. Acknowledged as the premier system for the creation and development of Class A surfaces, ICEM Surf bridges the demands of aesthetic designers and production engineers from visualisation right up to tool and die designers. The flexibility of ICEM Surf results in high-quality surfaces required in today\’s design environment, while substantially reducing overall design time. Product development teams using ICEM Surf leave the traditional process behind. ICEM Surf\’s integrated solutions enable users to implement a new, more efficient method of product development called Virtual Modelling. Stylists and engineers work out design treatments dynamically on screen and immediately see the aesthetic, as well as the...

Cadence IUS is the Incisive Unified Simulator which is used in classes such as ECE130 and CSSE232. This software allows you to perform behavioral simulation on Verilog and VHDL code.product:Cadence IUS 8.1 Linux Lanaguage:english Platform:Winxp/Win7 Size:1.81G

SIMetrix and SIMPLIS SIMetrix is a mixed-mode circuit simulation package designed for professional electronics engineers. SIMetrix comprises a substantially enhanced SPICE simulator, schematic editor and waveform viewer in a unified environment. SIMetrix/SIMPLIS is an advanced software tool that enables efficient design of power electronics circuits. SIMetrix/SIMPLIS combines accuracy and convergence in a unique and powerful design environment, enabling 10-50x faster simulation for power supply designs.Circuit Simulation Software SIMetrix Technologies provides reliability, ease of use and accuracy in a range of professionally-packaged circuit simulation tools. With industry-proven performance and technical support to match, SIMetrix Technologies offers an affordable alternative to unsupported freeware and high-priced EDA solutions.Product:Catena SIMetrix Simplis 5.4 Linux Lanaguage:english Platform:Winxp/Win7 Size:87MB

Dynamic Design Solutions announces that FEMtools 3.3 has been released on all supported operating systems. FEMtools 3.3 is a major revision of the FEMtools suite that adds new functionality and improves existing modules. The new release extends the application reach of FEMtools in the design optimization field. The highlights of FEMtools 3.3 are: * New module for design optimization * Upgraded FE interfaces (ANSYS, NASTRAN, ABAQUS, I-DEAS) to support the latest versions of these programs. * Faster solvers * Improved modal pretest analysis * Importing and exporting probabilistic analysis results * Generation of scatter plots * Probabilistic correlation and model updating with uncertain data * FE model reduction using Design of Experiments (DOE) * Extended scripting functionality * New RLM...

::::::English Description:::::: GEOPAK Site provides a visual, interactive environment for site design, augmenting MicroStation s graphical capabilities with a set of dynamic and flexible site design tools. GEOPAK Site synchronizes design, analysis and conflict checking for all project phases: site, drainage, water and sewer and road design. Geared to handle the real-world iterative project process, GEOPAK Site lets you quickly explore a wealth of design scenarios. Special features handle any type of site object, from ponds to cul-de-sacs. Soil, rock or water volumes and material quantities are automatically calculated — enabling well-balanced, efficient planning that streamlines site development and construction. GEOPAK Site is used for a range of projects: commercial and manufacturing sites, urban complexes, subdivisions, parks and golf courses...

::::::English Description:::::: Our standards-based, integrated solution provides the necessary functionality to address the most complex issues faced by your design teams. The 6.4 series expands the advanced design and debug capabilities in ModelSim as well as delivering improved performance, capacity, support for new design and verification language features in SystemVerilog and numerous productivity and ease-of-use enhancements.  ModelSim SE (Special Edition) is our UNIX, Linux, and Windows-based simulation and debug environment, combining high performance with the most powerful and intuitive GUI in the industry. Features Multi-language, high performance simulation engine Verilog, VHDL, SystemVerilog Design Code Coverage SystemVerilog for Design Integrated debug JobSpy Regression Monitor Mixed HDL simulation option SystemC Option TCL/tk 32 and 64-bit platform support — Solaris, Linux, Windows product:Mentor...

CircuitWorks for SolidWorks is a bi-directional IDF and PADS file interface for the SolidWorks 3D CAD system. CircuitWorks adds in to SolidWorks and allows it to read and write the industry standard IDF 2.0, 3.0 or 4.0 format files produced by Electrical CAD (ECAD) systems used for Printed Circuit Board (PCB) design. It can also read *.asc files from the Mentor PADS ECAD systemProduct:CircuitWorks 9 SP21 For SolidWorks Lanaguage:english Platform:Winxp/Win7 Size:10MB

GoldenGate is the most trusted simulation, verification and analysis solution available for integrated RF circuit design. Its unique simulation algorithms enable full characterization of complete transceivers prior to tape-out. Frequency- and time-domain techniques are used to accurately verify the most complex RFIC/Wireless design performance. To ensure device manufacturability and reduce design spins, GoldenGate automates the simulation, control and analysis of complex verification schemes. GoldenGate is fully integrated into the Cadence Analog Design Environment.Key Benefits of GoldenGate * Best performance, capacity and accuracy to complete your RFIC designs on time with the highest level of designer productivity * Delivers increased manufacturability using powerful Monte Carlo, Corners and Yield analysis capability * Uniquely verifies 3G and 4G RF performance using standards-based system...