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PCBM Matrix IPC-7351A LP Wizard 2009.18

PCBM Matrix IPC-7351A LP Wizard 2009 是IPC7351标准的PCB封装(footpoint/cell)生成工具,用于生成符合DFM要求的PCB封装符号。 ::::::English Description:::::: The IPC-7351A LP Wizard is a fantastic time saver. It is a land pattern calculator based on the IPC-7351A SMT land pattern standard that allows you to define your own CAD land patterns and offers seamless compatibility with the freely-distributed library documentation. Advanced features include:• Graphic display of component features aligned with calculated land pattern • Compensation variables for fabrication and assembly processes• Preset operating environments or user defined goals for land pattern toe, heel and side protrusions• Solder joint analysis calculations• DRC protection from overlapping lands• Automatic land pattern name generation• Save library documentation for later reference/retrieval• Edit part attribute names and values• Easily group parts by project The IPC-7351A...

Engineous ISIGHT 9.0

Engineous ISIGHT 9.0正式版发布。 Our legacy iSIGHT like iSIGHT-FD is designed to help engineers manage the computer software required to execute simulation-based design processes, including commercial CAD/CAE software, internally developed programs, and Excel spreadsheets. These products enable the rapid integration of these programs and automates their execution to accelerate the evaluation of many more design alternatives. In addition, they provide leading edge design exploration and optimization technology to ensure that an optimal design is discovered that meets or exceeds all customer requirements. Using Engineous solutions, product design organizations can greatly reduce design cycle time and manufacturing cost, and significantly improve product performance, quality, and reliability.  Product:Engineous ISIGHT 9.0 Lanaguage:English Platform:/win2000/winxp Size:526MB

Molegro Data Modeller 2008 1.5.0

Molegro Data Modeller – Modelling, mining, and visualization Multiple Linear Regression, Partial Least Squares, Support Vector Machines, and Neural Networks. Principal Component Analysis, Clustering, and Outlier Detection. Feature selection and automated parameter tuning of regression models. Histogram, 2D, and 3D plots. High-dimensional data visualization using Spring-Mass Maps. product:Molegro Data Modeller 2008 1.5.0 Lanaguage:english Platform:Winxp/Win7 Size:10MB

Molegro Virtual Docker 2008_2.4.0

Molegro Virtual Docker – Software for drug discovery Protein-Ligand docking. Similarity screening (template docking). Induced fit docking. Create regression models using built-in data analyzer (neural nets and MLR). Cavity prediction. product:Molegro Virtual Docker 2008_2.4.0 Lanaguage:english Platform:Winxp/Win7 Size:17MB

Synopsys TetraMAX 2007.12 SP5 Linux

TetraMAX® ATPG automatically generates high quality manufacturing test patterns. It\’s the only ATPG solution optimized for a wide range of test methodologies and integrated with Synopsys\’ patented DFTMAX™ compression the leading test synthesis tool. The unparalleled ease-of-use and high performance provided by TetraMAX ATPG allows RTL designers to quickly create efficient, compact tests for even the most complex designs. PDFDownload Datasheet Key Benefits * Increases product quality with power-aware test patterns for high defect detection * Reduces testing costs through the use of advanced pattern compaction techniques * Increases designer productivity by leveraging integration with Synopsys DFTMAX compression * Creates tests for complex and multi-million gate designs Features * Extremely high capacity and performance * Multicore support for accelerated run...

Ansoft HFSS 10.1 Linux

The main HFSS interface is shown in Figure 1, which illustrates the main components of thegui. They are summarized as follows:• 3D Modeler Window This is the area where you create the model geometry. Thiswindow consists of the model view area (or grid) and the history tree as shown inFigure 2. The history tree documents the actions that have been taken in the modelview area, and provides an alternative way to select objects in the model view area.• Project Manager with Project Tree The project manager window displays detailsabout all open HFSS projects. Each project ultimately includes a geometric model, itsboundary conditions and material assignments, and field solution and post processinginformation. An expanded view of the project manager is shown...

Cadence LEC Conformal 7.2 Linux

General verification tips:– Take advantage of the different compare efforts (Low,Med, High, Super, Ultra, Complete).– Handling cell libraries – verify first the library cells andthen use one view for both golden and revised.– LEC parallel compare enables us to reduce thememory load per machine and sometimes it enablesto resolve abort points in that way.Comparing a design in one piece is harder thancomparing all the different pieces one by one.– Use the write hier_compare command to generate thehierarchical comparison script.– This technique is efficient and enables LEC to handlesmaller logic cones at each time.• Due to the nature of our design, LEC will abort when trying tocompare the huge combinational function (the abort point).• Note that recent versions of LEC reducedsignificantly...

Cadence Conformal Constraint Designer (ccd) v61.Linux

Cadence Design System公司日前发布了一种新型形式分析工具,能生成、分析并验证设计师用于运行综合、时序分析和布局布线工具的设计约束(design constraints)的质量。   传统上,用户手动创建设计约束,采用事实上的Synopsys Design Constraint (SDC)标准格式,将它们输入到他们的工具内,运行工具,然后生成违反设计约束的清单。但Cadence高级产品市场经理Ramesh Dewange表示,IC设计日益复杂,需要用户不仅校验HDL和版图的错误,还要验证约束。   “Conformal Constraint Designer是在给定设计问题下确保有效时序约束的产品。它有助于快速时序收敛,并能帮助用户查找出细小的设计约束错误。”Dewange表示。Dewange表示该工具设计用于配合Cadence或第三方的综合、静态时序和布局布线工具使用。   该工具从静态定时器及版图工具读入RTL和门级网表、SDC及可选的关键路径网表。 product:Cadence Conformal Constraint Designer (ccd) v61.Linux Lanaguage:English Platform:linux Size:545MB

Cadence FINALE 6.1 Linux

Cadence FINALE 6.1 Linuxproduct:Cadence FINALE 6.1 Linux Lanaguage:english Platform:Winxp/Win7 Size:544MB

Cadence AMS Methodology Kit 5.1 Linux

The Cadence® AMS Methodology Kit employs theCadence Advanced Custom Design (ACD) methodology,which leverages silicon-accurate design methods toenable design teams to create differentiated silicon fasterand with less risk. The kit delivers verified, packagedmethodologies (demonstrated on a real-world mixed-signal design) along with applicability consulting.product:Cadence AMS Methodology Kit 5.1 Linux Lanaguage:english Platform:Winxp/Win7 Size:870MB