Professional Software Archive

如何判断应用程序或系统在推出之前是否满足企业的需要？ 未检测出来的应用程序瓶颈是否导致了减速或停机？ 是否对稳定地部署企业系统,而又不产生性能异常感到艰难？ 如何了解应用程序或系统在生产中是否能够扩展支持预期的使用级别？ Mercury LoadRunner 通过在部署新系统或更新之前检测瓶颈，防止生产中发生耗资不菲的性能问题。可以验证新的或更新的应用程序在推出前将提供预期的业务成果，防止硬件和基础架构上的过度开销。它是具备行业标准的负载测试解决方案，用于预测系统行为和性能，它也是如今市场中唯一集成负载测试、调整和诊断的方案。通过 LoadRunner Web 测试软件，您可以衡量端对端性能、诊断应用程序和系统瓶颈以及进行调整以获得更佳性能，所有这些都通过单点控制实现。它支持广泛的企业环境，包括 Web 服务、J2EE 和 .NET。 使用 LoadRunner 能够：准确了解端对端系统的性能。 验证新的和更新的应用程序使其符合特定的性能需求。 确定并消除开发生命周期中的性能瓶颈。 将脚本时间降低 80% LoadRunner 现在包括策略变更技术，可将脚本创建流程减少至几次鼠标单击。LoadRunner的 Web（单击和脚本）让您可以在较高表示层记录脚本。它会自动捕获最重要的脚本信息，以创建简洁、直观和自解释的脚本，从而将脚本时间和维护平均降低 80%。这些脚本也更易于维护，因为任何人都可以查看脚本并快速了解每个语句的状况。此外，Web（单击和脚本）降低了执行负载测试所需的技术技能。Product:Mercury Loadrunner 9.5 Lanaguage:English Platform:/WinNT/2000/XP Size:1.66G

SMC and Synopsys Collaborate to Validate Galaxy Custom Designer Solution with TSMC 28nm iPDK MOUNTAIN VIEW, Calif., June 9 /PRNewswire-FirstCall/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has collaborated with TSMC to validate Synopsys\’ custom design solution with TSMC\’s 28-nanometer (nm) interoperable process design kit (iPDK) and Analog/Mixed-Signal (AMS) Reference Flow 1.0. TSMC\’s 28nm reference phase-locked loop (PLL) design was used to validate Synopsys\’ comprehensive custom solution while demonstrating productivity-enhancing capabilities of the TSMC AMS Reference Flow 1.0. The validated solution from Synopsys includes the Galaxy Custom Designer® implementation, HSPICE® circuit simulation, CustomSim™ FastSPICE simulation, StarRC™ parasitic extraction and IC Validator physical verification solutions. Through...

Galaxy Custom Designer™ LE is the modern-era choice for layout entry and editing, enabling users to meet the challenges of today\’s fast-moving nanometer designs with little or no learning curve. As with all Custom Designer tools, layout editing tasks are accomplished with fewer clicks, quicker menu access, and less pop-up menu clutter. Architected from the ground up with maximum productivity in mind, Custom Designer LE enables ultra-fast layout editing with advanced P-cell support and time-saving layout automation through capabilities like intelligent multipart paths that maintain DRC correctness. An integral component of the full Custom Designer system, LE provides transistor-level layout and editing capabilities in a unified platform for both cell-based and mixed-signal custom content which speeds complex chip design and...

Cadence Encounter RTL Compiler 9.1 Linux allows engineers to look across the entire design as they employ concurrent optimization techniques, such as making tradeoffs among timing, area, and power. To maximize performance, decrease die size, reduce power consumption, and boost productivity, designers need a global synthesis solution that enables concurrent optimization of timing, area, and power. Encounter RTL Compiler, a key component of the Cadence Logic Design Team Solution, delivers production-proven global synthesis for faster, smaller, and low-power chips in less time. With its unique set of patented global-focus algorithms, combined with new physically-aware optimization and analysis, Encounter RTL Compiler cuts design time while ensuring the highest quality of silicon. Features/Benefits A well-balanced logic structure isolates critical paths and reduces power,...

Mentor Graphics Calibre 2009.3_15 Linux Release! Calibre® is the overwhelming market share leader and the industry standard for IC physical verification, due to the outstanding performance, accuracy and reliability of Calibre products. Over the last two years, Calibre nmDRC™ has reduced average DRC runtime by a factor of five, while Calibre\’s innovative Hyperscaling and MTFlex™ technologies have cut memory requirements in half. Calibre nmDRC also reduced overall cycle time with incremental DRC, which allows designers to make DRC runs in parallel. As DRC violations are reported, designers can immediately fix and recheck just the affected areas, while the initial DRC run continues. To handle complex and multi-variate, multi-dimensional checks that are not adequately addressed by traditional design rules, Calibre nmDRC\’s...

SOLIDCast® lets you see how your casting will solidify before you make pattern equipment, dies and costly mistakes. Pour your test castings on the computer, not on the foundry floor! Design gates, risers and test them out before making your first casting. Solidification modeling helps you to shorten lead times, produce higher quality and improve yield. All of this means lower costs, higher profits and improved marketability for your foundry.SOLIDCast® can be used to simulate castings poured in gray iron, ductile iron, steel, aluminum, copper-base, magnesium, nickel-based and almost any other alloy. A database of several hundred alloys, with their properties, is included. With SOLIDCast® you can simulate processes such as green sand, chemically-bonded sand, investment and permanent mold. You...

LimitState:GEO is a groundbreaking geotechnical software product which uses new technology to allow users to more rapidly assess the stability of slopes, retaining walls, footings and virtually any other geotechnical feature. More comprehensive than simple hand-based methods but far easier to use than Finite Element Analysis, with LimitState:GEO you can quickly and easily: Analyse geotechnical stability problems of almost any type – including combined problems simultaneously involving slope stability, soil nails, retaining walls, footings and tunnels. Product:LimitState GEO v2.0 Lanaguage:english Platform:Winxp/Win7 Size:39MB

Roxar ASA, a technology solutions provider to the upstream oil and gas industry, released Tempest 6.5, the latest version of its advanced reservoir simulation software suite. Tempest 6.5 comes with extended parallel processing capabilities and speed improvements in both serial and parallel simulation runs, allowing users to conduct faster simulation runs in greater levels of detail. Tempest 6.5’s licensing costs will allow operators to equip more engineers with full function simulation than they can with other simulators. Its greater value for money encourages more asset team members to engage in the simulation process. Tempest 6.5’s improved visualisation capabilities for the user, including the ability to calculate streamlines for each phase from the simulator results and to develop 3D cross sections,...

SIwave HeadingSignal- and Power-Integrity Analysis for High-Performance PCBs and IC Packages SIwave™ analyzes entire printed circuit boards (PCBs) and IC packages prevalent in modern electronic products. The software allows engineers to perform complete signal- and power- integrity analyses from DC to beyond 10 Gb/s. SIwave extracts frequency-dependent circuit models of signal nets and power distribution networks directly from electrical CAD layout (E-CAD) databases. These analyses aid in the identification of signal and power-integrity problems and are critical to designers seeking first-pass system success. Entire design paths from package to board to package can be analyzed using a full-wave electromagnetic simulator realizing coupling effects between packages and boards that are often ignored. With an IC die network modeler, first order silicon...

Agilent Systemvue 2009.08 Win is a focused electronic design automation (EDA) environment for electronic system-level (ESL) design. It enables system architects and algorithm developers to innovate the physical layer (PHY) of wireless and aerospace/defense communications systems and provides unique value to RF, DSP, and FPGA/ASIC implementers. As a dedicated platform for ESL design and signal processing realization, SystemVue replaces general-purpose digital, analog, and math environments. SystemVue speaks RF, cuts PHY development and verification time in half, and connects to your mainstream EDA flow. Key Benefits of SystemVue   Best-in-class RF fidelity among today’s baseband/PHY environments – allows baseband designers to virtualize the RF and eliminate excess margin Superior integration with Test accelerates real-world maturity and streamlines your model-based design flow,...