EDA Design Page 169

With the Cadence® SoC Encounter™ RTL-to-GDSII System, engineers can account for the effects of interconnect across the entire chip—from the outset of the implementation cycle. It combines RTL synthesis, silicon virtual prototyping, automated floorplan synthesis, clock network synthesis, design for manufacturability and yield, low-power and mixed-signal design support, and nanometer routing. It also offers the latest capabilities to support advanced 65nm and 45nm designs. Features/Benefits * Supports multiple implementation styles with built-in power-planning, floorplanning, and signal integrity analysis * Supports multiple methodologies for flip-chip implementation, promoting concurrent chip/package design * Provides a statistical static timing analysis solution and standardized ECSM library models * Incorporates cutting-edge yield and low-power design capabilities * Handles 50M+ gate designs at 90nm and below Encounter...

Technology Computer-Aided Design (TCAD) refers to the use of computer simulations to develop and optimize semiconductor processing technologies and devices. Synopsys TCAD software solves fundamental, physical partial differential equations, such as diffusion and transport equations, to model the structural properties and electrical behavior of semiconductor devices. This deep physical approach gives TCAD simulation predictive accuracy for a broad range of technologies. Therefore, TCAD simulations are used to reduce the costly and time-consuming test wafer runs when developing and characterizing a new semiconductor device or technology. Synopsys TCAD tools are used by all leading semiconductor companies throughout the technology development cycle. At the early stage of technology development, TCAD tools allow engineers to explore product design alternatives such as engineering the...

ICX / TAU ICX® and ICX Pro provide an intuitive user interface for engineers to explore signal integrity solutions in their high-speed designs. Engineers learning signal integrity are offered a concise view of how things work, while those more seasoned are able to investigate signal integrity effects in their designs in great detail. Components are modeled using industry standard IBIS models, with support for virtually all IC model types, while simulations are provided by our proven ICX simulation technology. With a library of default IBIS models provided, engineers can begin evaluating high-speed design solutions easily and quickly. The Tau® board-level symbolic timing analysis tool performs comprehensive worst-case timing analysis and verification on designs using an advanced symbolic timing methodology, eliminating...

Sisoft Quantum-Sl 2008.10 SP4 is the recognized leader for high-speed design among electrical and signal integrity engineers, with a proven track record for addressing tough high speed design problems.  Quantum-SI\’s comprehensive analysis capabilities accurately predict system-level noise and timing margins while significantly reducing the time and effort required to perform analysis with traditional methods.  Quantum-SI\’s interface-centric analysis approach allows engineers to quickly and easily analyze an entire design for the composite effects of signal integrity, crosstalk and timing and achieve first pass success. Quantum-SI\’s advanced data and simulation management allows designers to easily simulate and manage thousands of simulations. Product:Sisoft Quantum-Sl 2008.10 SP4 Lanaguage:English Platform:/win2000/winxp Size:186MB

Novas Verdi 2009.04—自动化侦错系统针对数字设计的侦错提供了先进的解决方案。 The Verdi 自动化侦错系统 Verdi自动化侦错系统针对数字设计的侦错提供了先进的解决方案，其中的技术包括： • 了解设计中复杂与不熟悉的行为 • 将困难与琐碎的侦错过程自动化 • 整合多元且复杂的设计环境 详细介绍:节省一半侦错时间 Verdi自动化侦错系统让使用者能专注在更有价值的设计上，凭借以下的独特技术，大体上可减少至少百分之五十以上的侦错时间： • 使用独家的行为分析(Behavior Analysis)技术自动追踪设计行为 • 以各种不同且功能强大的窗口提取并呈现相关逻辑电路 • 展现设计, 断言(assertion), 以及testbench运作下的交互关系  Product:Novas Verdi 2009.04 Lanaguage:English Platform:/Linux Size:351MB

During European Microwave Week in Amsterdam, Computer Simulation Technology (CST) announced the release of Version 2009 of the electromagnetic simulation software CST STUDIO SUITE, including its flagship product CST MICROWAVE STUDIO (MWS). Researchers and design engineers use CST STUDIO SUITE for the analysis and optimisation of EM based components. By choosing the most appropriate solver technology, making use of sophisticated import filters, and automated optimization and parametric studies, design throughput can be significantly augmented. Users of CST STUDIO SUITE version 2009 will benefit from numerous enhancements, including a total revision of the tetrahedral frequency domain solver\’s mesh adaptation scheme, transient EM/circuit co-simulation, MPI based parallelization for the fast solution to large problems on clusters, and the porting of the user...

Synopsys推出PrimeRail及新的验证解决方案今年是Synopsys公司进入中国的第10个年头，他们表示，近年来中国IC设计的复杂程度不断提升，已经或即将在几个月后进入90nm设计的公司有10家左右，同时市场压力也不断增大，因此设计厂商需要更加全面、开放、灵活和高效的EDA平台。Synopsys持续不断地在为市场引入创新产品，在今年的Synopsys亚太区技术巡展上，他们展出了为实现最复杂的系统级芯片开发而推出的先进的设计和验证平台、DFM解决方案、全面的IP产品组合以及设计服务等。除集成了物理综合、时钟树生成、布线、良率优化，以及签字确认（sign-off）相关性的下一代物理设计系统IC Compiler外，用于电源网络签字确认的PrimeRail也颇受关注。如今，有70%的芯片都有嵌入式的存储器IP，因此在验证这些存储器的可靠度和良率时，需要拥有正确的电源网络签字确认技术。PrimeRail采用了Synopsys的数个核心执行技术，包括电路模拟、寄生阻抗提取、以及静态时序分析等，能够有效分析完整芯片上静态与动态电压降和电子迁移等各种状况，提供准确结果。在推出了PrimeRail之后，Galaxy平台可以提供完整的解决方案，正确而有效地处理时序、信号完整性和电源网络的签字确认等问题。在验证方面，Synopsys推出了最新的VCS 2005.06版本的RTL验证解决方案，在其中增加了许多新功能，使工程师可以更容易地找到更多的设计错误，并将验证性能提升了五倍。新工具中包含了最新的VCS断言IP库，加入了对AMBA 2 AHB/APB协议和PCI接口等业界标准的协议检查器。另外，VCS中高性能的NTB（Native TestBench）技术经扩展后，合并了业界领先功能完整的SystemVerilog测试平台的解决方案，并提供本地SystemC语言的仿真。product:Synopsys PrimeRail 2007.12 Linux Lanaguage:English Platform:/Linux Size:81MB

Mentor Graphics Design Capture-Expedition Flow 2007.5 Win32 为完成高密度PCB 与薄膜MCM 的布局、分析与生产提供最具生产力的工具。为最大限度地提高生产能力，用户可迅速、简便地访问所有基本设计工具。在能快速完成100%布线的编辑环境中，即使设定了最苛刻的规则，Expedition PCB Pinnacle 也可保证用户在板上集成所有器件。Expedition PCB Pinnacle 不断被证明是独一无二的最佳工具。得到用户所需的竞争能力、快速上市时间及最大的生产能力Expedition PCB 的界面可完全由用户定义，避免了由于工具的繁琐而给生产带来的阻碍。用户可根据自己的需要以图形方式对Expedition PCB 的下拉菜单、图标工具栏、功能键及快捷键进行定义。从设计环境中去除不常用的命令，可获得最高的生产效率。工具间通讯能力保证设计计划按正确方向发展Expedition PCB 通过ITC(工具间通讯)与Design Capture 紧密集成。ITC 保证Design Capture 与Expedition PCB 数据库总保持同步，并在任何环境中发生修改时通知系统工程师或PCB 设计者。随着项目由概念转向最终产品，原理图与PCB 不匹配的危险被降至最低，同时也避免了不必要的、价格昂贵的重复设计。有了ITC，所有设计人员均使用当前数据进行工作，从而避免了推迟上市时间及PCB 生产与原始设计脱节等问题。良好的工具间集成可使多个设计人员同时对电路的不同部分进行定义、仿真及设计，从而提高了设计的可靠性与生产效率。布局/布线—- 目前世界上功能最强的布线器在进行器件布局、布线时，Mentor Graphics 的高级编辑器无疑是最佳环境。交互与自动模式均采用最新技术实现可生产的高质量印刷电路版设计。信号规则和限制条件从电路的设计输入阶段传递过来，保证首次即正确布线。为在投产前完成修改，只需打开自动布线器的动态推挤选项。采用这一全自动、高级的布局、布线工具，用户将获得无以伦比的能力，以最高的效率完成设计工作。享有盛誉的交互、批处理自动布线器由于采用基于形状的无网格布线技术，Expedition PCB 提供了更高的性能与布通率，为得到较高的效益，用户可根据生产需要制定设计规则。片刻完成“最后一分钟修改”   Mentor Graphics Design Capture-Expedition Flow 2007.5 Win32 is a state-of-the-art front-end design package. Driving a full suite of digital and analog simulation and design tools, Design Capture enables you to rapidly and easily realize your design concepts, bringing them to life faster, and more accurately and profitably than ever before. Design Capture gives you the freedom to use traditional schematic-based entry with methods that are already familiar and comfortable to you. During creation, designs may be partitioned into various functional blocks and...

HyperLynx® Signal Integrity enables engineers to quickly and accurately analyze and eliminate signal integrity and EMI/EMC design problems early in the design cycle. HyperLynx Signal Integrity comes ready to use in virtually any PCB design flow and offers unprecedented time-to-results, improving productivity, reducing development and product costs, and increasing product performance.Signal integrity (SI) analysis is an essential part of modern electronic design. Increasingly fast edge rates in today’s integrated circuits (ICs) cause detrimental high-speed effects, even in PCB designs running at low operating frequencies. As driver ICs switch faster, a growing volume of boards suffer from signal degradation, including over/undershoot, ringing, glitching, crosstalk, and timing problems. When degradation becomes serious enough, the logic on a board can fail. Hardware engineers,...

::::::English Description:::::: Sonnet Suite Release 12 3D Planar High-Frequency Electromagnetic Software Sonnet s suites of high-frequency electromagnetic (EM) Software are aimed at today s demanding design challenges involving predominantly planar (3D planar) circuits and antennas. Predominantly planar circuits include microstrip, stripline, coplanar waveguide, PCB (single and multiple layers) and combinations with vias, vertical metal sheets (z-directed strips), and any number of layers of metal traces embedded in stratified dielectric material. The Sonnet Suites develop precise RF models (S-, Y-, Z-parameters or extracted SPICE model) for planar circuits and antennas.  The software requires a physical description of your circuit (arbitrary layout and material properties for metal and dielectrics), and employs a rigorous Method-of-Moments EM analysis based on Maxwell s equations that...