EDA Design Page 148

IAR visualSTATE is a set of highly sophisticated and easy-to-use development tools for designing, testing and implementing embedded applications based on state machines. IAR visualSTATEClick image to enlarge It provides advanced verification and validation utilities and generates very compact C/C++ code that is 100% consistent with your system design. In addition, the new and revolutionizing integration with IAR Embedded Workbench®, a fully integrated C/C++ compiler and debugger toolset, enables true state machine debugging on hardware—get direct graphical feedback on various levels of detail.Product:IAR visualSTATE v6.3.1 Lanaguage:english Platform:Winxp/Win7 Size:75 MB

Design Reuse A mechanism through which a block of items in a design may be stored and reused in one or more designs. Second Component Name You can now add two PCB component names so they can exist in different locations on different layers e.g. Silkscreen and Assembly layers New Attribute Editor Dialog Component Attributes are presented in a tabbed property sheet dialog containing a grid control. New SCM and New PCB Dialogs These dialogs allow you to choose settings when creating a new design from a template. Part Acceptance If an existing part becomes obsolete or is expensive to use, then when adding this part to a design a message warns the user of the consequences of using this...

LP Wizard Suite is a complete set of tools to build and manage your CAD library and documentation using proven technology from IPC. LP Suite is the only CAD library generation tool that is officially approved by IPC to match the IPC-7351 standard. A full featured 30-day evaluation version is available by web registration. CAD tools supported include Allegro, Altium, Board Station, CADSTAR, CR-5000, Eagle, Expedition Enterprise, McCAD, OrCAD Layout, OrCAD PCB Editor, PADS Layout, P-CAD, Pantheon, Pulsonix , Ultiboard.Build Library Parts Quickly and Easily Flexible template based component families make it incredibly easy to build accurate lead-free ROHS CAD library parts. Starter library comes with 10,000 different component packages including 5,000 connectors in a CAD neutral format that can...

What\’s New in S-Edit v15.01Spice and Verilog-A Text ViewsS-Edit now supports Spice and Verilog-A text views. Any combination of i) schematic,ii) Spice, and iii) Verilog-A view may be saved for a cell. The view that is used whensimulating is given by a priority list of view types and view names defined in theHierarchy Priority tab of the Setup Simulation dialog. A similar list is on the ExportSpice dialog for use when exporting Spice.Spice Command ToolThe Spice Command Tool for inserting new Spice commands is now available in theAdditional Spice Commands page of the Setup Simulation dialog. The InsertCommand… button is used to invoke the wizard.Model Parameter ListingsA table showing all the models supported in T-Spice is now available in S-Edit...

The AWR Design EnvironmentTM (AWRDE) 2010 version includes the following new features, enhancements, and user interface changes. AWRDE documentation includes both PDF documents and CHM (Help) files. The PDF files are available for download from the AWR website and are also included on AWRDE CDs. The CHM files are available via the AWRDE Help menu. This document includes a brief description of each new or revised feature, and where applicable, a link to the location in the documentation that provides full feature details. The Help file links work automatically because the full set of documentation is installed with the software. To link from this document to the full feature details in PDF files, all of the PDF files must be...

VCS®, with multicore technology, delivers a 2x verification speed-up that helps users find design bugs early in the product development cycle. VCS multicore technology cuts down verification time by running the design, testbench, assertions, coverage and debug in parallel on machines with multiple cores. The combination of performance; advanced bug-finding technologies; Echo testbench coverage convergence for faster closure; a built-in debug and visualization environment; support for all popular design and verification languages including Verilog, VHDL, SystemVerilog, OpenVera, and SystemC™ and the proven VMM methodology help VCS users develop high-quality designs. The VCS solution’s advanced bug-finding technologies include full-featured Native Testbench (NTB), complete assertions and comprehensive code and functional coverage to find more design bugs faster and easier. Additionally, the VCS...

Saber is a multi-domain modeling and simulation environment that enables full-system virtual prototyping for applications in analog/power electronics, electric power generation/conversion/distribution and mechatronics. Decades of industry success and innovation have earned Saber a reputation as the solution of choice for design validation and optimization for automotive, aerospace and industrial systems. SaberRD: Desktop Environment for Power Electronic Design * Introduced in 2010 * Easy to use—Windows-based IDE * Novice accessibility—Expert flexibility * Proven technology * Demo/Student version Focus: Manage power electronic and mechatronic complexity by accelerating Robust Design via simulation * Automotive (mid-class car) — 50+ microprocessors, 100+ sensors, 30+ electrical subsystems * Aerospace (A380) — 530km of wires, 100,000 cable sections, 40,300 connectors * Solar — power electronics, control algorithms,...

MPro 2010.07 is a maintenance release for EMPro 2010. EMPro is a new design platform for analyzing the electromagnetic effects of RF and microwave components such as high-speed IC packages, antennas, on-chip and off-chip embedded passives and PCB interconnects. EMPro features the most modern design, simulation and analysis environment, highest capacity simulation technology and integration with the industry\’s leading RF and microwave circuit design environment, Advanced Design System (ADS) for fast and efficient RF and microwave circuit design.Whats new Platform Improvements * New Bondwire Geometry Component * ODB++ File Import * Several UI Enhancements (Boolean multiple objects, geometry transform shortcuts, etc.) * Transform functions: Scale, Translate, Rotate, Reflect, Shear for object manipulation * Windows 7 Support Finite-Difference Time-Domain (FDTD) Improvements...

High Level Synthesis High Level Synthesis reduces the manual effort required to create and completely verify synthesizable RTL code. Design size and complexity continue to push traditional RTL design and verification methodologies to their limits. Catapult C SynthesisFull-Chip High-Level Synthesis Catapult C Synthesis is a high-level synthesis tool for ASIC and FPGA hardware designers who need to deliver optimal implementations with aggressive time-to-market requirements.Traditional hardware design methods that require hand-written RTL development and debugging are too time-consuming and error prone for today’s complex designs. Catapult C empowers designers to use industry standard ANSI C++ and SystemC to describe functional intent and move up to a more productive abstraction level. From these high-level descriptions, Catapult C generates production quality RTL. With...

VICTORY PROCESS3D PROCESS SIMULATOR VICTORY PROCESS is a general purpose 3D process simulator. VICTORY PROCESS includes a complete process flow core simulator and three advanced simulation modules: Monte Carlo Implant, Advanced Diffusion and Oxidation, and Physical Etch and Deposit. Proprietary models, as well as public domain research models, can be easily integrated into VICTORY PROCESS using the open modeling interface. Key Features * Sophisticated multi-particle and flux models for physical deposition and etching with substrate material redeposition * Extremely accurate and fast Monte Carlo implant simulation * Comprehensive set of 3D diffusion models: Fermi, three-stream, and five-stream * 3D physical oxidation simulation with stress analysis * Fast 3D structure prototyping capability enables the in-depth physical analysis of specific processing issues...