EDA Design Page 125

Advanced Platform Architecture Package Vista™ Architect is a complete TLM 2.0-based solution for architecture design and exploration enable system architects and SoC designers to make viable architecture decisions, prototype and analyze complex systems, understand the key scaling algorithms, and ensure optimized architecture, shorter implementation cycle and first time success.View Detail As, networking, storage systems and multi-core SoCs are rapidly becoming more complex, making architecture decisions increasingly critical and directly impacting competitive advantage. Configuring multi-core hardware/software architectures and communication fabrics, and ensuring the system can carry its load and data traffic capacities, are all critical tasks. Vista Architect offers top-down modeling (Vista Model Builder), a set of key architecture blocks that can be easily configured, an intuitive graphical assembly platform (Visual...

New Job Backup ToolThe new Genesis Backup tool enables you to backup jobs on a networkrepository and restore them when you need them. Among other benefits,this enables you to keep several versions of the same job.For more information, see “New Backup Tool” on page 8.New Resize AlgorithmA new algorithm for the Resize operation was introduced in Version 10.0that eliminates all unexpected behaviors that may occur during Resizeoperations. It also improves Fill and Pattern Fill operations.For more information, see “New Resize Algorithm” on page 13.Sync Material Panels from InPlanFlex to Genesis viaInLinkYou can now sync material panels defined by InPlanFlex® to Genesis.You no longer need to create panel information separately in Genesis —merely import the information, via InLink, from InPlanFlex to...

CST STUDIO SUITE 2012 CST proudly announces the 2012 release of its electromagnetic simulation software CST STUDIO SUITE®. With over 60 man years of research and development and over 3000 functional changes, CST STUDIO SUITE 2012 again sets the standard for electromagnetic simulation software. The focal points of 2012 development can be briefly summarized as implementing and integrating new solver technology, improving simulation performance and extending the applicability.Useful links Microwave Journal product feature about System Assembly and Modeling Videos about new features of CST STUDIO SUITE 2012 Press releases: New Simulation Project Environment in CST STUDIO SUITE 2012 New solver in CST STUDIO SUITE 2012 CST STUDIO SUITE Shipping Completed CST STUDIO SUITE 2012 Update Webinar Series CST European User...

MMSIM 12.1 contains many new features to aid RF designers. Many of these changes are described in my Part 1 blog post. I\’ve saved my favorite for last….here\’s a preview of the changes to the nport component in MMSIM12.1. 1. The Edit Object Properties/Add Instance form has been revised for better usability. 2. For most S-parameter files, only the S-Parameter file name and the number of ports need to be specified. (See the red boxes in the GUI below). The default settings for all of the other properties are suggested. nport1a gui 3. When you select the Browse and select s-data file button, the following GUI appears and allows you to browse and select the desired s-parameter data file. Once...

Industry-leading designers of today’s most advanced designs rely on the Synopsys VCS© functional verification solution for their verification environments. In fact, 90% of designs at 32nm and below are verified with VCS. Used by a majority of the world’s top 20 semiconductor companies as their primary verification solution,VCS provides the high performance simulation engines, constraint solver engines, Native Testbench (NTB) support, broad SystemVerilog support, verification planning, coverage analysis and closure, and an integrated debug environment. VCS has continually pioneered numerous industry-first innovations, and is now poised to meet the challenges and complexity of today’s SoCs. With features such as constrained random testbench, SoC optimized compile flow, coverage, and assertions, VCS has the flexibility and capabilities that are critical for today’s...

Cadence Encounter Digital Implementation v12Cadence® Encounter® Digital Implementation (EDI) System provides the most effective methodology to maximize performance, and minimize area and power for high-performance, giga-scale designs. Integration with the Virtuoso® custom design environment ensures seamless data transfer and increases productivity for mixed-signal designs. EDI System also supports advanced 20nm process technologies and system-in-package/3D-IC design. With these capabilities, EDI System delivers the most comprehensive solution for physical implementation of today’s most demanding designs. BenefitsPredictability and convergence Combines full-chip implementation with in-design signoff analysis in a single environment Enables design exploration and accurate chip feasibility analysis, including automated floorplan synthesis and ranking, as well as hierarchical budgeting and planning for convergent hierarchical implementation results New GigaOpt and CCOpt engines deliver better...

Automating workflows from customer design to the production floor Genesis 2000 creates a seamless pre-production environment for automating processes, from the customer’s door to the production floor. Genesis 2000 combines planning, product engineering, and tooling into a single seat, supported by a unified ODB++ database. Add modular integration and an intuitive interface and you have unmatched bottom line results: higher throughput and measurable cost savings.Automation for speed and accuracy With the most extensive line-mode command access in the industry and embedded automation tools, you can automate planning, job analysis, editing, photo-tool creation, drill, rout, fixturing, AOI, electrical testing outputs, and workflow management. The accuracy of ODB++ contour-based algorithms means high repeatability, improved quality, and complete tooling consistency. ODB++ for data...

Xilinx introduced the ISE Design Suite software to enable breakthrough optimizations for power and cost with greater design productivity. For the first time, ISE design tools deliver \’intelligent\’ clock-gating technology that reduces dynamic power consumption by as much as 30 percent. The new suite also provides advances in timing-driven design reservation, AMBA 4 AXI4-complaint IP support for plug-and-play design, and an intuitive design flow with fourth-generation partial reconfiguration capabilities that lowers system cost for a broad range of high performance applications. With full production support for all Xilinx Virtex-6 and Spartan-6 FPGA families, the ISE release continues its evolution as the industry\’s only domain-specific design suite with interoperable design flows and tool configurations for logic, digital signal processing (DSP), embedded...

VICTORY Process3D PROCESS SIMULATOR VICTORY Process is a general purpose 3D process simulator. VICTORY Process includes a complete process flow core simulator and three advanced simulation modules: Monte Carlo Implant, Advanced Diffusion and Oxidation, and Physical Etch and Deposit. Proprietary models, as well as public domain research models, can be easily integrated into VICTORY Process using the open modeling interface.Key Features Sophisticated multi-particle flux models for physical deposition and etching with substrate material redeposition Extremely accurate and fast Monte Carlo implant simulation Comprehensive set of 3D diffusion models: Fermi, three-stream, and five-stream 3D physical oxidation simulation with stress analysis Fast 3D structure prototyping capability enables the in-depth physical analysis of specific processing issues Accurately predicts 3D topology and 3D dopant...

OverviewFormality® is an equivalence-checking (EC) solution that uses formal, static techniques to determine if two versions of a design are functionally equivalent. The size and complexity of today’s designs, coupled with the challenges of meeting timing, area, power and schedule, requires that the newest, most advanced synthesis optimizations be fully verifiable. Formality supports all of the out-ofthe- box DC Ultra optimizations and so provides the highest quality of results that are fully verifiable. Formality supports verification of power-up and power-down states, multi-voltage, multi-supply and clock gated designs. Formality’s easy-to-use, flow-based graphical user interface and auto-setup mode helps even new users successfully complete verification in the shortest possible time. PDFDownload Datasheet Key benefits Perfect companion to DC Ultra – supports all...