As technology feature sizes shrink, conductors get smaller, and supply voltages reduce, the corresponding current per scaled feature size increases exponentially. These changes cause power-rail IR (voltage) drop and electromigration (EM) effects that significantly degrade performance and might cause the circuit to malfunction. To eliminate such problems, Astro-Rail™ provides an accurate and design-stage comprehensive sign-off solution for power consumption, IR drop and EM analysis for advanced-technology designs. Astro-Rail is an important component of Synopsys?Milkyway™-based Galaxy™ solution. Using Synopsys?proprietary Dynamic-Macromodeling™ technology, Astro-Rail assists in reducing time to market and ensures reliability. In Astro-Rail, IR drop and EM analysis of million gate designs are completed in minutes. Astro-Rail provides sign-off quality analysis results within five percent tolerance of HSPICE® with Star-RCXT™ parasitic...
:::::English Description::::::Synopsys?JupiterXT™ design planning solution enables fast feasibility analysis for a preview of implementation results, and provides detailed floor planning capabilities for flat or hierarchical physical design implementation styles. Project leaders and physical designers of ASIC or COT designs benefit from the accurate prediction and production-proven convergence JupiterXT provides. Feasibility analysis is supported for incomplete netlists in the form of black boxes or early gate level netlists. Powerful placement algorithms incorporate designers?knowledge of black box content and produce routable floorplan results using autoshaping with full rectilinear support. If gate netlists are available, the placement algorithms apply a virtual flat approach that places hard macros and standard cells simultaneously. As more detailed design content is added to netlists as a result...
Synopsys, Inc. today announced that UMC has adopted Synopsys TetraMAX diagnostics to accelerate yield learning for designs that utilize the Synopsys DFT MAX scan compression automation solution. Rapid yield learning depends on the accuracy and efficiency of failure analysis, a manually intensive and time-consuming process of identifying the individual circuit in a design that could cause a device to fail. Using Synopsys TetraMAX diagnostics to perform this task automatically on DFT MAX-compressed scan patterns, UMC engineers were able to substantially decrease the time and effort required for failure analysis. \”As part of UMC\’s leading-edge manufacturing products and services, we are continuing to build upon our portfolio of robust rapid learning tools,\” said S. R. Sheu, Product Engineering Director at UMC....
Piranesi is a specialised ’3D painting’ tool, allowing you to start with a simple rendering of a 3D model, and quickly develop it into high quality images ready for client presentations. You can use Piranesi to quickly develop photorealistic images, by painting in textures and scenery with automatic perspective and masking; or you can Piranesi’s wealth of effects to generate non-photorealistic images that have a more subtle, hand-rendered feel and focus the client’s mind of what is important in the design. You can even use Piranesi with a 2D plan or elevation image, or to generate Panoramas! With Piranesi there are three basic steps to creating images that will capture your clients’ imaginations and help you win business. Product:Informatix Piranesi...
Autodesk® Inventor® products offer a comprehensive, flexible set of software for 3D mechanical design, product simulation, tooling creation, and design communication. Inventor takes you beyond 3D to Digital Prototyping by enabling you to design, visualize, and simulate your products.Product:AUTODESK STUDIO VIEWER 2008 Lanaguage:english Platform:Winxp/Win7 Size:94MB
UGS JT Utilities 6.1.0.0 Win&Unix This version of the JT Utilities incorporates features from the latest DirectModel release, version 6.1 and the latest JT Open Toolkit release, version 2.2. This version also includes support for the Linux OS.Product:UGS JT Utilities 6.1.0.0 Win&Unix Lanaguage:English Platform:/WinNT/2000/XP/Unix Size:326MB
The WinLoG version 5 extension module of StrataExplorer can be used to quickly create, edit boring and well logs for a variety of industries. The module is a major upgrade to our very popular WinLoG version 4 program. We are also distributing and supporting version 4 of the WinLoG program. WinLoG can be used to quickly create, edit and print geotechnical, environmental, mining, and oil & gas borehole and well logs.Product:GAEA Winlog 4.43 Lanaguage:english Platform:Winxp/Win7 Size:54MB
Mentor Graphics Vendor-Independent Flow 2006-IND2006 Linux 完整的PCB设计解决方案，包含具有强大功能的布局和模拟工具的概略图定义 ::::::English Description:::::: Mentor Graphics Announces Precision RTL Plus for FPGA Synthesis – Vendor-Independent Flow 2006 Linux(IND2006) New Features for IND2006 ICX The following are the new features for ICX 3.6.0-ICX Pro simulator -ICX Pro Waveform Analyzer with FFT -Allegro 15.5 interface support -Support for ndd-files with long property values I/O Designer-Concurrent design of FPGA and PCB through bi-directional communication between FPGA and PCB design environments-Optimize FPGA pin assignments for PCB routing and system performance -Automatic symbol generation and fracturing -I/O design data management -FPGA constraints verification including Timing constraints -Configurable power and ground PCB signal names -View of layout placement for I/O optimization –Automatic unravel nets -Mapping between HDL and PCB signal names -Import...
>::::::English Description:::::: Mentor Graphics Announces Precision RTL Plus for FPGA Synthesis – Vendor-Independent Flow 2006(IND2006) New Features for IND2006 ICX The following are the new features for ICX 3.6.0-ICX Pro simulator -ICX Pro Waveform Analyzer with FFT -Allegro 15.5 interface support -Support for ndd-files with long property values I/O Designer-Concurrent design of FPGA and PCB through bi-directional communication between FPGA and PCB design environments-Optimize FPGA pin assignments for PCB routing and system performance -Automatic symbol generation and fracturing -I/O design data management -FPGA constraints verification including Timing constraints -Configurable power and ground PCB signal names -View of layout placement for I/O optimization –Automatic unravel nets -Mapping between HDL and PCB signal names -Import PCB design wizard -Full synchronisation wizard -DMS corporate...
NX redefines CAD productivity with unique High Definition 3D technology and powerful new design tools that boost your efficiency, accelerate the design process, lower costs, and improve decision-making while enhancing the 3D aspects of the High Definition PLM framework. Learn More About NX 7 CAD CAE Productivity NX redefines CAE productivity by integrating leading geometry tools with powerful new analysis technology for modeling, simulation, automation and test correlation. Synchronize simulation with design, perform faster design-analysis iterations, and make better engineering decisions to deliver better products faster. Learn More About NX 7 CAE Manufacturing Productivity NX redefines part manufacturing productivity with two new applications that put you in the context of a specific programming task: NX Turbomachinery Milling, for programming complex...