ETAP PowerStationAn Intelligent Simulator for Design, Analysis, Maintenance, and Operation of Electrical Power SystemsA fully integrated graphical simulator that works directly with one-line diagrams (ac and dc), coordination curves, cable raceways, ground grids, panels, and more. ETAP PowerStation Management System (PSMS™)Online Monitoring, Simulator, and Supervisory ControlBring your PowerStation model to life! As an extension to PowerStation, PSMS is a fully customizable application designed to provide engineering analysis, remote monitor, control, and simulation of induatrial and power utility systems, generation plants, and industrial facilities.Product:Etap PowerStation 6.0 Lanaguage:english Platform:Winxp/Win7 Size:489MB
Eplan Electric P8 1.9.11 多国语言含简体中文版 通过我们的EPLAN Electric P8，我们发起了工程中的新维数。多种功能广阔的范围使各学科间的全球协作成为现实。可以在图形和目标方位之间自由的选择，我们的软件为您的成功提供尖峰技术，它自身修改对用户的需求没有限制。这确保软件操作的可靠性和快速的效果。 独特的期待 EPLAN Electric P8知道您需要什么。它为完美的结合和有效的工作流程提供了变量技术，不同的界面，和广泛的自动操作。简而言之，EPLAN Electric P8为您的各学科之间的工程提供前所未有的机会。 电气工程的下一个维数 EPLAN Electric P8-电气工程中的新维数使绘图和目标导向同时工作。使用独特的平台技术，EPLAN 5 和 EPLAN 21支持的全部数据，变量技术，国际化，和广泛的自动操作，EPLAN Electric P8开创了生产力的开端。 由于独特的工程平台，这个创新的解决方案可以灵活的按照您的需求进行配置。大量不同的界面使有效的工作流程更简单的结合。简而言之，EPLAN Electric P8是各学科间的电气工程的无限的无约束的解决方案。 Product:Eplan Electric P8 1.9.11 Lanaguage:English Platform:win2000/winxp/win2003 Size:906MB
AceCad Software is delighted to announce the global release of StruCad V15. This revolutionary second StruCad release of 2008 includes substantial new software developments for increased flexibility and contains the very latest .NET software development technology. With new features and advanced functionality across all areas of the StruCad system, AceCad Software is proud of its leading development program that significantly increases the competitive advantages of our valued clients. StruCad V15 enables unlimited multi user collaboration and advanced model management functionality, together with rapid issuing tools - all facilitated by incorporation of the very latest software technology. With increased connection design capabilities and new cold rolled modeling functionality, engineering integration, component specification and advanced ordering are facilitated. Together with many timesaving new features, the...
MasterSeries 2010 Released I am delighted to inform you that the MasterSeries 2010.04 Version is now available for download. This major version update presents a number of significant enhancements. Here are just some of the top new features. New 3D Model Manager Gravity and Wind Area Loading application methods. No more dummy members, handling any panel shape for one way spanning loading. Much easier and more intuitive panel based application methods. Automatic Wind Panel Generation for any shape structure, with auto detection of parapets and canopies New controllable snap points in member generation with member tracking feature. Improved snap graphics. In Axial with Moment Check, option to automatically include nominal column design moment from beam shear eccentricities. Product:CSCC MasterSeries 2010.04.26 Lanaguage:english...
ispLEVER is the complete design environment for the latest Lattice programmable logic products. It includes a comprehensive set of powerful tools for all design tasks, including project management, IP integration, design planning, place and route, in-system logic analysis, and more. ispLEVER 8.0 SP1 ispLEVER® 8.0 Service Pack 1 (SP1) is now available. This software release includes an update to the support of the LatticeECP3 FPGA family including enhanced support of generic DDR interface, enhanced support of DDR3 memory interface, and improved targeting of the sysDSP™ block. An updated version of Synopsys® Synplify Pro® for Lattice (D2009.12L) and Aldec® Active-HDL™ Lattice Edition (8.2 update 3) are included in 8.0 SP1. Product:Lattice ispLever 8.0 SP1 Lanaguage:english Platform:Winxp/Win7 Size:1.83G
IntroductionThis Tutorial will help you to become familiar with operation Aldec Active-HDL simulator in the LatticeispLEVER environment. No prior knowledge of HDL simulation tools is required, but elementaryknowledge of VHDL and Verilog will be helpful.If you want to refresh your VHDL/Verilog, you are welcome to use our Interactive Tutorials: justgo to the Help menu in Active-HDL GUI, and then select the Interactive VHDL Tutorial orInteractive Verilog Tutorial option. The same tutorial is also accessible directly from theinstallation CD.After reading this tutorial, you will be able to launch Active-HDL simulator from ispLEVER, compile and runand debug functional simulation and post-route timing simulations.Configuring ispLEVER to launch Aldec Active-HDL simulator1. Double-click the ispLEVER icon on your desktop.2. Click on the Options tab in...
明導國際(Mentor Graphics)日前宣佈針對PCB系統設計推出新型Expedition Enterprise流程。包含用于Win的第二个升级包。 該流程能夠幫助大型電子公司全面product:Mentor Graphics Expedition Enterprise 2007.8 update2 Win Lanaguage:English Platform:/WINXP/WIN2003 Size:1.04G
::::::English Description:::::: Design Capture™ is a state-of-the-art front-end design package. Driving a full suite of digital and analog simulation and design tools, Design Capture enables you to rapidly and easily realize your design concepts, bringing them to life faster, and more accurately and profitably than ever before. Design Capture gives you the freedom to use traditional schematic-based entry with methods that are already familiar and comfortable to you. During creation, designs may be partitioned into various functional blocks and represented with different levels of hierarchy. Each level is readily described using either schematics or HDLs. Designs are also easily captured using your choice of top-down, bottom-up and middle-out methodologies, allowing complex systems to be easily represented and traversed.product:Mentor Graphics Design...
::::::English Description:::::: Want a powerful, yet easy to use simulation environment? SynaptiCAD’s simulation and debugging tools provide a standard interface for controlling all of your simulation tools. SynaptiCAD’s timing diagram editors have the most extensive and accurate timing analysis features available in any timing diagram editor on the market including delay correlation, reconvergent fan-out, and clocks that model jitter and buffer delays. Three different levels of editing let you pick the best price and feature set for your application. Free yourself from the time-consuming process of manually writing Verilog, VHDL, and SystemC test benches. Generate them graphically from timing diagrams. SynaptiCAD provides 3 levels of test bench generation to meet all your design needs. SynaptiCAD offers support for the...
Ease of Use CAMWorks® uses the familiar SolidWorks® interface, so it is easy to learn and easy to use. The CAMWorks trees are similar to the SolidWorks FeatureManager design tree. Items in the tree can be suppressed, expanded, renamed and moved using the same procedures as SolidWorks. Online help, Installation and Quick Start Guide and tutorials can help you generate toolpaths and code quickly. The tutorials are provided electronically in Adobe PDF files. Minimize Efforts CAMWorks is a feature-based CAM system that provides the ability to automatically recognize many machinable features. Automatic Feature Recognition (AFR) analyzes the solid model geometry and identifies mill features such as holes, slots, pockets, and bosses; turning features such as outside diameters, faces, grooves and...